Photonic Package Face-to-Face Bonding for Signal Transfer

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Solution Overview

Problem

Silicon photonic integration in packaging requires efficient connection of photonic integrated circuits (PICs) to driver chips, with challenges in signal transfer due to distance limitations and impedance issues, and existing methods lack clear guidance on optimal configuration for high-speed communication.

Innovation Solution

A photonic subpackage design with face-to-face configuration using an organic interposer, where the PIC die underhangs to expose an area for waveguide attachments, and a base substrate with a through-hole for attachment near the end of the assembly process, enabling low impedance and capacitance for efficient signal transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional photonic packaging methods are used, then assembly is simpler, but signal transfer distance is too long causing impedance issues and reduced speed

Engineering Contradiction:

Improvesignal transfer speedVSAvoidpackaging configuration complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent transitions from traditional lateral/planar packaging arrangement to a three-dimensional face-to-face configuration. The PIC die is positioned vertically beneath the driver chip, with optical interfaces facing each other directly. This dimensional change reduces signal transfer distance and eliminates impedance issues while enabling high-speed communication.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs a nested packaging structure where the PIC die is positioned within the packaging substrate, and the driver chip is mounted on top. The optical waveguides are embedded within the substrate, creating a compact nested arrangement that minimizes distance while maintaining structural integrity.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Strength

If PIC die is fully covered by packaging substrate, then protection is improved, but waveguide attachment area is reduced

Engineering Contradiction:

ImprovePIC die protectionVSAvoidwaveguide attachment area

Core Design Contradiction:

StrengthVSArea of stationary object

Solution Approach 1:

The PIC die is segmented into two functional regions: a protected region covered by the packaging substrate for mechanical protection and electrical connections, and an exposed region where optical waveguides attach directly to the substrate. This segmentation allows simultaneous achievement of protection and optical interface accessibility.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The packaging substrate provides selective coverage: it protects the electrical and mechanical portions of the PIC die while leaving the optical waveguide interface area exposed. This local quality approach ensures that protection is applied only where needed, maintaining both durability and optical functionality.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS11209598B2Photonics package with face-to-face bonding

Publication Date: 2021.12.28 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A photonic package is provided. The photonic package includes a base substrate defining an aperture, a top die and a photonic integrated circuit (PIC) die. The top die includes a body with first and second top die sections. The first top die section is connectable with the base substrate. The PIC die includes body with first and second PIC die sections. The PIC die is disposable in the aperture such that the second PIC die section is connectable with the second top die section and the first PIC die section extends beyond the second top die section and is exposed for connection to a waveguide assembly.