Photonic Integrated Package Layout for Lower-Cost Optical Coupling

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Solution Overview

Problem

Conventional photonic packages are costly due to the use of Silicon-on-Insulator (SOI) substrates and have large sizes necessitating overlapping areas for electrical and optical components, which increases manufacturing costs and limits efficiency.

Innovation Solution

A method involving encapsulating a photonic die in an encapsulant with through-vias for connections, reducing the size of the photonic die and using redistribution lines to connect electrical and optical components, and attaching optical couplers for efficient signal transmission, while forming the package on a carrier and de-bonding it to reduce material costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Silicon-on-Insulator (SOI) substrates are used for photonic packages, then optical signal transmission quality is improved, but manufacturing cost increases

Engineering Contradiction:
Improveoptical signal transmission qualityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces expensive SOI substrates with standard silicon substrates that can be processed using existing CMOS fabrication techniques. This substitution uses more abundant, cheaper materials while maintaining optical transmission functionality through alternative waveguide structures and bonding approaches.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent modifies the substrate parameters by transitioning from SOI (silicon-on-insulator) to standard silicon substrates. This involves changing the material composition and structural parameters to accommodate standard silicon processing while achieving comparable optical performance through adjusted waveguide designs and bonding interfaces.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If photonic packages use overlapping areas for electrical and optical components, then component integration is achieved, but package size increases

Engineering Contradiction:
Improvecomponent integrationVSAvoidpackage size
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar two-dimensional layout to a three-dimensional stacked architecture. Electrical and optical components are arranged in different vertical layers rather than overlapping horizontally, enabling high integration density while minimizing the footprint area. Through-silicon vias and vertical interconnects facilitate communication between stacked layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested packaging structure where smaller photonic components are integrated within or alongside larger electrical substrate structures. This nested arrangement allows multiple functional layers to coexist in a compact configuration, with optical waveguides, modulators, and detectors embedded within the vertical stack of the electrical substrate.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Ease of manufacture

If photonic die size is reduced, then manufacturing cost decreases, but available area for component placement is reduced

Engineering Contradiction:
Improvemanufacturing costVSAvoidcomponent placement area
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent compensates for reduced planar area by utilizing the vertical dimension. Components are distributed across multiple stacked layers, with each layer containing a subset of the total component count. This vertical distribution maintains adequate placement area for all components while keeping the overall die footprint small, reducing manufacturing costs associated with larger substrates.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the photonic package into multiple functional segments or modules distributed across different layers. Each layer contains specific optical or electrical components that are independently optimized for their function. This segmentation allows efficient use of limited area on each layer while maintaining all necessary components through the vertical stack.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11901196B2Method for forming photonic integrated package
Publication Date: 2024.02.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11901196B2 patent drawing
  • US11901196B2 patent drawing
  • US11901196B2 patent drawing

AI summary

A method includes placing an electronic die and a photonic die over a carrier, with a back surface of the electronic die and a front surface of the photonic die facing the carrier. The method further includes encapsulating the electronic die and the photonic die in an encapsulant, planarizing the encapsulant until an electrical connector of the electronic die and a conductive feature of the photonic die are revealed, and forming redistribution lines over the encapsulant. The redistribution lines electrically connect the electronic die to the photonic die. An optical coupler is attached to the photonic die. An optical fiber attached to the optical coupler is configured to optically couple to the photonic die.