Photonic Processor Pattern Matching Speed Power Trade-off

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Solution Overview

Problem

Existing pattern recognition systems face challenges in processing large volumes of data at high speeds, particularly in telecommunications, where electronic systems struggle with power consumption and scalability, and may produce false alarms, limiting their effectiveness in real-time applications.

Innovation Solution

A photonic processor that maps data to memory locations using hashing functions to efficiently search for pre-defined patterns in a dictionary, allowing for high-speed pattern matching with low power consumption and scalability, while minimizing false alarms through adaptable architecture and entropy conditioning.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If software based systems are used for pattern matching, then flexibility and adaptability are maintained, but processing speed becomes insufficient for high data rates

Engineering Contradiction:
Improvesystem flexibilityVSAvoidpattern matching speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent replaces electronic/software-based pattern matching with optical/photonic processing. The optical system uses light interference and diffraction to perform pattern recognition operations at speeds impossible for electronic systems, while maintaining the ability to search for multiple patterns simultaneously through optical parallelism

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent transitions from sequential electronic processing to parallel optical processing by utilizing the spatial dimension of light waves. Multiple patterns can be processed simultaneously in different spatial locations within the optical field, effectively adding a dimensional aspect to the processing architecture

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If special purpose electronic hardware is used for high speed pattern matching, then processing speed improves, but power consumption becomes impracticable

Engineering Contradiction:
Improvedata processing speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent substitutes electronic hardware with optical hardware for pattern matching operations. Optical systems using light interference and diffraction require significantly less power than electronic systems performing the same high-speed pattern recognition tasks, while achieving the required processing speeds

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If the memory is densely populated with dictionary entries, then pattern matching completeness improves, but false alarm rate increases

Engineering Contradiction:
Improvepattern detection accuracyVSAvoidfalse alarm rate
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different processing qualities to different parts of the pattern matching process. The optical system performs initial high-speed filtering for potential matches, then electronic verification is applied only to candidates that pass the optical stage. This localized application of different processing methods reduces false alarms while maintaining detection accuracy

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9330344B2Photonic processor with pattern matching and image recognition
Publication Date: 2016.05.03 QINETIQ LTD
  • US9330344B2 patent drawing
  • US9330344B2 patent drawing
  • US9330344B2 patent drawing

AI summary

Apparatus (100) is provided which is arranged to accept an input data stream. In some embodiments, the apparatus (100) comprises a sampler arranged to sample the input data stream to provide k samples thereof, wherein each of the samples is n bits long and a string selector arranged to select m binary strings n bits long from at least a chosen subset of all random binary strings of a predetermined length. The apparatus (100) may further comprise a logical operator arranged to perform a logical function for each of the k samples with each of the selected binary strings to provide a vector, a memory arranged to store a matrix of the vectors generated from k samples, and an address generator arranged to generate RAM address segments from the matrix. In embodiments, the apparatus (100) may comprise a processor for, for example, pattern matching; feature detection, image recognition.