Photonics Chip Stacking in Semiconductor Packages for Shorter Signal Paths

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Solution Overview

Problem

Existing semiconductor packages face challenges in integrating optical integrated circuits effectively, leading to increased electrical signal distances and reduced integration capabilities.

Innovation Solution

A semiconductor package design that includes a package substrate, an interposer substrate, and a photonics chip structure with an electronic integrated circuit portion, an optical integrated circuit portion, an edge coupler, a waveguide, and a glass connector, which reduces electrical signal distance and enhances integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If optical integrated circuit chips are integrated into semiconductor packages, then functionality is improved, but electrical signal distance increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidelectrical signal distance
Core Design Contradiction:
Adaptability or versatilityVSLength of stationary object

Solution Approach 1:

The patent transitions from horizontal arrangement to vertical stacking of chips. The optical integrated circuit chip is mounted on the interposer substrate, and the electronic integrated circuit chip is stacked vertically on top of it, utilizing the vertical dimension to reduce horizontal signal transmission distance while maintaining functional integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the electronic integrated circuit chip is placed on top of the optical integrated circuit chip, with the interposer substrate serving as the base layer. This nested arrangement allows multiple functional components to be integrated in a compact vertical configuration, reducing overall package size and signal path length.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If multiple chip structures are integrated vertically, then integration capability is improved, but device complexity increases

Engineering Contradiction:
Improveintegration capabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the integrated circuit system into distinct functional segments: the optical integrated circuit chip for optical signal processing, the electronic integrated circuit chip for electrical signal processing, and the interposer substrate for interconnection. This segmentation allows each component to be optimized independently while simplifying the overall integration process through standardized interfaces.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interposer substrate acts as an intermediary between the optical and electronic integrated circuit chips. It provides the necessary electrical connections, signal routing, and mechanical support, simplifying the integration process by decoupling the interface requirements of the two different chip types and enabling modular assembly.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design achieves shorter electrical signal distances and increased integration by vertically stacking optical and electronic integrated circuit chips, thereby improving the functionality and efficiency of semiconductor packages.

Implementation Method 1

an edge coupler extending toward the groove, and a waveguide connected to the edge coupler

Methodology Applied
Scientific EffectOptical coupling: Refraction

Data Source

PatentUS20250183242A1Semiconductor package
Publication Date: 2025.06.05 SAMSUNG ELECTRONICS CO LTD
  • US20250183242A1 patent drawing
  • US20250183242A1 patent drawing
  • US20250183242A1 patent drawing

AI summary

A semiconductor package includes a package substrate, an interposer substrate disposed on the package substrate, and a photonics chip structure mounted on the interposer substrate, wherein the photonics chip structure includes an electronic integrated circuit portion including an electronic integrated circuit chip mounted on the interposer substrate, an optical integrated circuit portion including an optical integrated circuit chip having a groove at a corner of an upper portion thereof and mounted on the electronic integrated circuit chip, an edge coupler extending toward the groove, and a waveguide connected to the edge coupler, and a glass connector mounted in the groove of the optical integrated circuit portion and facing the edge coupler.