Photonics Chip Underfill Fillet Geometry for Crack Prevention
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Solution Overview
Problem
Conventional fillets in packaged photonics chips are unable to prevent cracking of the back-end-of-line stack and delamination of the fillet, leading to reliability issues and reduced operational lifetime.
Innovation Solution
A structure comprising a photonics chip, a packaging substrate, electrical connections in a gap between the chip and substrate, and a fillet of underfill material with a specific width-to-height ratio greater than or equal to 1.5, which overlaps with the photonics chip and extends along the edge of the packaging substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional fillet is formed with underfill material, then the gap is filled and electrical connections are protected, but cracking of the back-end-of-line stack and delamination of the fillet occur
Solution Approach 1:
The patent changes the geometric parameters of the fillet by controlling the width-to-height ratio to be greater than or equal to 1.5. This parameter modification optimizes the stress distribution within the fillet, preventing both cracking of the back-end-of-line stack and delamination of the fillet while maintaining protection of electrical connections.
2Strength
If the fillet width-to-height ratio is increased to prevent cracking and delamination, then structural integrity improves, but the fillet may not adequately fill the gap or protect electrical connections
Solution Approach 1:
The patent establishes an optimal range for the width-to-height ratio (≥1.5) that simultaneously achieves both structural integrity and electrical connection protection. This parameter optimization ensures the fillet is sufficiently wide and low to maintain strength while still effectively filling the gap and protecting the electrical connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure reduces strain in the back-end-of-line stack and prevents failures due to stress-induced crack formation and delamination, thereby enhancing the operational reliability and lifetime of the package assembly.
Implementation Method 1
Underfill material may be introduced into the gap by capillary action. A low-viscosity fluid underfill material may be pre-heated and dispensed onto a surface of the laminate substrate adjacent to one or more side edges of the photonics chip. Capillary action cause the fluid underfill material to flow into the gap.
Data Source
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AI summary
Structures for a packaged photonics chip and associated methods. The structure comprises a photonics chip, a packaging substrate, a plurality of electrical connections disposed in a gap between the photonics chip and the packaging substrate, and a fillet comprising an underfill material. The fillet is disposed to overlap with a portion of the photonics chip adjacent to the gap, the fillet has a width dimension and a height dimension transverse to the width dimension, and a ratio of the width dimension to the height dimension is greater than or equal to 1.5.