Photorelay Switch Timing Control to Prevent MOSFET Overlap

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Solution Overview

Problem

Existing semiconductor devices, such as photorelays, face challenges in preventing simultaneous turn-on of switch elements, which can lead to inefficiencies and potential damage.

Innovation Solution

The semiconductor device incorporates a configuration with A-type and B-type switches, each controlled by a light emitting element and a light receiving element, with specific voltage control circuits and switch control circuits to adjust the timing of switch operations, preventing simultaneous turn-on.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If two sets of source common MOSFETs are used in a photorelay, then the switching functionality is enhanced, but simultaneous turn-on of both MOSFETs may occur causing inefficiency and potential damage

Engineering Contradiction:
Improveswitching functionalityVSAvoidsimultaneous turn-on prevention
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by introducing a reset circuit that actively manages the state of two sets of source common MOSFETs. The reset circuit includes a first reset signal generation circuit and a second reset signal generation circuit that preemptively control the MOSFETs to ensure one is turned off before the other turns on, preventing simultaneous conduction. This preliminary control mechanism addresses the reliability issue while maintaining the enhanced switching functionality of having two MOSFET sets.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If timing control circuits are added to prevent simultaneous turn-on, then reliability improves, but device complexity increases

Engineering Contradiction:
Improveswitch control precisionVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses an intermediary approach by introducing a reset circuit as a mediating component between the light receiving element and the two sets of source common MOSFETs. This reset circuit includes reset signal generation circuits that act as intermediaries to coordinate the switching of both MOSFET sets, ensuring proper timing and preventing simultaneous turn-on. The intermediary reset circuit manages the complexity by centralizing the timing control function in a dedicated module rather than distributing complex control logic throughout the entire device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents simultaneous turn-on of the A-type and B-type switches, enhancing operational efficiency and reliability while allowing for high-speed switching operations.

Implementation Method 1

a light emitting element (for example, a light emitting diode (LED))

Methodology Applied
Scientific EffectLight emitting diode (LED): Light Emitting Diode

Implementation Method 2

a circuit on the secondary side with a light receiving element (for example, a photodiode)

Methodology Applied
Scientific EffectPhotodiode: Photoelectric Effect

Data Source

PatentUS12249982B2Semiconductor device
Publication Date: 2025.03.11 KK TOSHIBA
  • US12249982B2 patent drawing
  • US12249982B2 patent drawing
  • US12249982B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes first and second switch elements, first and second light emitting elements, first and second light receiving elements, first and second voltage control circuits, and first and second switch control circuits. The first switch control circuit is configured to cause the first light emitting element to emit light after a first time elapses after an input signal has transitioned from a first logic level to a second logic level. The second switch control circuit is configured to suspend light emission of the second light emitting element after a second time elapses after the input signal has transitioned from the second logic level to the first logic level.