Photosensitive Chip Package Layout With Backside Pad Rewiring
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Solution Overview
Problem
Conventional semiconductor packaging methods using transparent glass covers for photosensitive regions in camera devices suffer from light refraction and reflection losses, and adhesive failures that allow dust entry, compromising the photosensitive effect.
Innovation Solution
A semiconductor packaging method involving a chip substrate with a photosensitive region and pads, where a transparent protection layer is applied over the substrate, through-holes are formed to expose pads for electrical connection to a circuit board via a metal rewiring layer, and the structure is designed to minimize thickness and prevent dust entry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transparent glass cover is used to protect the photosensitive region, then the photosensitive region is protected from external contamination, but light refraction and reflection occur causing energy loss and degraded photosensitive effect
Solution Approach 1:
The patent changes the key parameter of the transparent protection layer from traditional thick glass to a thin transparent layer with optimized thickness. This parameter change reduces light refraction and reflection while maintaining protective function, directly resolving the contradiction between protection and energy loss.
Solution Approach 2:
The patent employs a thin transparent protection layer instead of traditional thick glass covers. This thin film approach minimizes optical interference while providing necessary protection, effectively reducing light energy loss during transmission.
2Reliability
If a transparent glass cover connected by glue is used, then the photosensitive region is protected, but the glue deteriorates over time allowing dust entry and affecting photosensitive effect
Solution Approach 1:
The patent extracts and eliminates the glue layer from the protective structure. By removing this deteriorating component, the design avoids the long-term reliability issues associated with glue degradation and dust entry, significantly extending the service life of the protective structure.
Solution Approach 2:
The patent merges the transparent protection layer directly with the chip substrate, creating an integrated structure without separate adhesive layers. This integration eliminates the interface where glue would deteriorate, preventing dust entry and maintaining long-term protection.
3Ease of operation
If pads are disposed around the photosensitive region on the front surface, then electrical connection is achieved, but the pads are exposed to external dust and contamination
Solution Approach 1:
The patent nests the pads within through-holes that penetrate the transparent protection layer. This nested structure allows electrical connection functionality while the pads remain enclosed within the protective structure, preventing dust and contamination from reaching the pads.
Solution Approach 2:
The patent transitions the pad arrangement from a two-dimensional surface layout to a three-dimensional structure where pads are positioned within through-holes. This dimensional change enables both electrical connection and protection by enclosing pads within the protective layer's volume.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces light refraction and reflection losses while maintaining a secure, dust-free environment for the photosensitive region, enhancing the chip's imaging performance by using a thinner transparent protection layer and direct electrical connections.
Implementation Method 1
when passing through the transparent glass, light undergoes refraction, reflection and energy loss
Implementation Method 2
when passing through the transparent glass, light undergoes refraction, reflection and energy loss
Implementation Method 3
curing the transparent protection film includes an ultraviolet irradiation
Implementation Method 4
curing the transparent protection film includes a high-temperature baking
Data Source
AI summary
A semiconductor packaging method and a semiconductor package device are provided. The packaging method includes providing a chip. The chip includes a chip substrate having a front surface and a back surface, where the front surface includes a photosensitive region; pads disposed at the front surface of the chip substrate and around the photosensitive region; and a transparent protection layer over the front surface of the chip substrate, where the transparent protection layer covers the photosensitive region and the pad. The packaging method also includes forming through-holes in the chip substrate at positions corresponding to the pads from the back surface of the chip substrate, where the pads one-to-one correspond to the through-holes and are exposed from the through-holes. Further, the packaging method includes electrically connecting each pad of the chip to a circuit board through a metal rewiring layer in a corresponding through-hole.


