Photosensor Using Oxide Semiconductor to Eliminate N-Type Doping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing process of P-I-N structure photosensors is complex and costly due to the requirement of two rounds of doping processes, which complicates the process and increases costs.
Innovation Solution
A photosensor is manufactured using an oxide semiconductor with an intrinsic silicon layer, a P-type doped region, and an oxide semiconductor layer, where the oxide semiconductor layer overlaps the entire region of the intrinsic silicon layer, eliminating the need for additional mask processes and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two rounds of doping process (P-type doping and N-type doping) are used to form the P-I-N structure, then the photosensor can convert optical signals to electrical signals effectively, but the manufacturing process becomes complex and manufacturing costs increase
Solution Approach 1:
The patent extracts and eliminates the N-type doping process from the traditional P-I-N structure manufacturing. Instead of forming both P-type and N-type doped regions through separate doping processes, the invention uses only P-type doping to create the P-type doped region, while the intrinsic silicon layer serves as the N-type equivalent, thereby simplifying the manufacturing process while maintaining the photosensor's core functionality
Solution Approach 2:
The patent employs a composite structure consisting of an intrinsic silicon layer combined with a P-type doped region formed through P-type doping. This composite approach replaces the traditional three-layer P-I-N doped structure with a simpler configuration that maintains the necessary electrical characteristics for optical-to-electrical signal conversion while reducing manufacturing complexity
2Reliability
If two rounds of doping process are used to form the P-I-N structure, then the photosensor achieves proper current flow characteristics, but manufacturing costs increase
Solution Approach 1:
The patent removes the N-type doping process from the manufacturing sequence, reducing the number of doping rounds from two to one. This extraction of the unnecessary N-type doping step directly lowers manufacturing costs while the P-type doped region combined with the intrinsic silicon layer maintains the required current flow characteristics through the reverse electric field mechanism
3Reliability
If traditional P-I-N structure with two doping processes is used, then the photosensor achieves sufficient light efficiency, but additional mask processes are required
Solution Approach 1:
The patent eliminates the need for additional mask processes by using only P-type doping to form the P-type doped region. The intrinsic silicon layer extends across the entire substrate area, allowing the P-type doping to be performed without requiring complex mask patterns to define N-type regions, thereby reducing the number of mask processes while maintaining light efficiency through the preserved intrinsic region geometry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing complexity and costs while maintaining appropriate current flow and light efficiency, enhancing the overall performance of the photosensor.
Implementation Method 1
A photosensor having a P-I-N structure is a semiconductor device which converts an optical signal into an electrical signal
Implementation Method 2
Consequently, electric current flows through the photosensor due to a reverse electric field of the intrinsic region
Data Source
AI summary
In a photosensor and a method of manufacturing the same, the photosensor comprises: an intrinsic silicon layer formed on a substrate; a P-type doped region formed in a same plane with the intrinsic silicon layer; and an oxide semiconductor layer formed on or under the intrinsic silicon layer, and overlapping an entire region of the intrinsic silicon layer.