Photosensor Substrate Stabilizing TFT Properties via Planarization
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Solution Overview
Problem
Conventional photosensor substrates face issues with TFT property instability due to etching processes and height differences in semiconductor and insulating films, which affect sensor performance and detection accuracy.
Innovation Solution
A photosensor substrate design featuring transistors with a semiconductor layer, drain and source electrodes, and a gate electrode positioned on the gate insulating film, along with photoelectric transducers connected via contact holes, which reduces process damage and enhances transistor stability and sensor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching is performed for formation of photoelectric conversion layer after TFT formation, then photoelectric transducer can be formed, but TFT property becomes unstable
Solution Approach 1:
A planarization insulating film is introduced as an intermediary layer between the TFT structure and the photoelectric conversion layer. This film serves as a buffer that prevents etching damage from affecting the TFT properties while still allowing the photoelectric transducer to be formed. The planarization film absorbs the mechanical stress and protects the underlying TFT structure during subsequent etching processes.
Solution Approach 2:
The gate electrode is formed to extend beyond the semiconductor layer boundaries before the photoelectric conversion layer is deposited. This preliminary extension creates an overlapping structure where the gate electrode provides mechanical support and protection to the semiconductor layer during etching, preventing property degradation before the actual photoelectric layer formation occurs.
2Device complexity
If height difference of semiconductor layer or insulating film exists due to gate electrode thickness, then TFT structure is formed, but TFT property is influenced
Solution Approach 1:
A planarization insulating film is deposited over the entire surface including areas with height differences caused by the gate electrode thickness. This creates a flat, equipotential surface that eliminates variations in film thickness and stress distribution across the TFT structure. The planarization ensures uniform electrical properties and prevents performance degradation that would result from height differences.
3Measurement precision
If detection surface size is increased to improve sensor performance, then detection accuracy improves, but TFT property stability becomes difficult to maintain
Solution Approach 1:
The structure is segmented into distinct functional layers with the planarization insulating film separating the TFT region from the photoelectric conversion region. This segmentation allows the detection surface to be enlarged in the photoelectric region without proportionally increasing the TFT region, thereby maintaining TFT property stability while achieving improved detection accuracy through larger active area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration stabilizes TFT properties, improves sensor performance by reducing etching damage and allowing for increased detection surface size and accuracy, while also enabling the use of oxide semiconductors for enhanced mobility and reduced leakage current.
Implementation Method 1
a gate insulating film covering the semiconductor layer, the drain electrode, and the source electrode
Implementation Method 2
photoelectric transducers disposed on the substrate... photoelectric transducer configured to convert incident light into an electrical signal
Data Source
AI summary
A photosensor substrate achieves TFT property stabilization and further improvement in sensor performance. The photosensor substrate includes a substrate 7, a photoelectric transducer 4, and a transistor 2. The transistor 2 includes a semiconductor layer 22, a drain electrode 23 and a source electrode 21 facing each other in a direction parallel to a plane of the substrate with the semiconductor layer 22 interposed therebetween, a gate insulating film 15 covering the semiconductor layer 22, the drain electrode 23, and the source electrode 21, and a gate electrode 24 facing the semiconductor layer 22 with the gate insulating film 15 interposed therebetween. The photoelectric transducer 4 includes a lower electrode 41 connected to the drain electrode 23 via a contact hole CH1 provided in the gate insulating film 15, a semiconductor film 42, and an upper electrode 43.