PHY Header Field Array for Parallel Packet Retransmission

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Solution Overview

Problem

Existing packet data networks face challenges in minimizing packet error rates (PER) and maintaining low latency due to serial error corrective actions, particularly in environments with short burst noises, such as the automotive industry.

Innovation Solution

A physical (PHY) layer with a centralized header descriptor array (HDA) that stores and manages packet header fields, enabling parallel processing and re-transmission requests to support ultra-low PER and low latency by using a write interface module, header field array, and read interface modules for parallel reading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If serial error corrective actions are used in the data link layer, then packet error rate is reduced, but transmission latency increases

Engineering Contradiction:
Improvepacket error rateVSAvoidtransmission latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the error correction process by implementing a first-in-first-out (FIFO) queue structure that separates packet reception, error detection, and retransmission handling into distinct stages. This allows multiple packets to be processed concurrently at different stages, reducing the overall latency while maintaining reliable error correction through systematic queue management and selective retransmission.

Inventive Principle:
Principle #1Segmentation

2Reliability

If retransmission mechanisms are implemented, then packet delivery reliability improves, but processing time increases

Engineering Contradiction:
Improvepacket delivery reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent implements preliminary action by pre-allocating FIFO queues and pre-processing packet headers to extract and validate critical information before full packet transmission. Error detection codes are calculated and verified in advance, and the system maintains ready-state retransmission buffers, allowing rapid response to errors without extensive processing delays when retransmission is needed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12526353B2Physical layer and methods for managing packet header fields
Publication Date: 2026.01.13 SAMSUNG ELECTRONICS CO LTD
  • US12526353B2 patent drawing
  • US12526353B2 patent drawing
  • US12526353B2 patent drawing

AI summary

A method for managing packet header fields in a physical (PHY) layer includes: receiving, by a header descriptor array (HDA) of a PHY layer, a data packet and a status signal of the data packet; writing, by the HDA, a header field for the received data packet; storing, by the HDA, the written header field and the status signal of the data packet in a header field array; and fetching, by the HDA, the header field of the data packet by enabling parallel reading of a plurality of locations of the header field array, enabling transmission and re-transmission of the data packet.