Physical Layer Clock Sync Symbols for High Resolution Timekeeping

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Solution Overview

Problem

Conventional clock synchronization protocols in distributed computing systems, such as NTP and PTP, incur significant processing overhead and bandwidth utilization, making them less effective for high-resolution timekeeping in applications like electronic trading systems, where precise timekeeping is critical and costly GPS clocks are often impractical.

Innovation Solution

The method involves generating and inserting clock sync symbols at arbitrary locations within symbol streams transmitted between nodes, allowing for high-resolution clock synchronization without recalculation of error-detecting codes, and using modified physical coding sublayers for efficient clock synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional clock synchronization protocols (NTP/PTP) are used, then clock synchronization is achieved, but processing overhead and bandwidth utilization increase significantly

Engineering Contradiction:
Improveclock synchronization precisionVSAvoidprocessing overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the clock synchronization function from upper-layer protocols and implements it at the physical layer through dedicated sync symbols. This separation removes the processing burden from network stack software, allowing synchronous operations to be handled directly by hardware components, thereby reducing CPU overhead and processing complexity while maintaining synchronization precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces software-based clock synchronization mechanisms with hardware-based physical layer implementations. By using dedicated sync symbols transmitted over the physical medium and processed by hardware components, the system eliminates the need for complex software protocol processing, reducing both processing overhead and latency while achieving high-precision synchronization.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If conventional clock synchronization protocols are used, then time information is transmitted, but bandwidth utilization increases due to packet overhead

Engineering Contradiction:
Improvetime synchronization accuracyVSAvoidbandwidth consumption
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts time synchronization information from data packets and transmits it through dedicated physical layer sync symbols. This extraction eliminates the need for encapsulating time information in upper-layer protocol packets, removing associated headers and overhead, thereby reducing bandwidth consumption while maintaining synchronization accuracy through specialized symbol transmission.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the transmission parameter from full protocol packets to compact physical layer symbols. By representing time synchronization information in condensed symbol form at the physical layer rather than as structured protocol packets, the system dramatically reduces the quantity of data transmitted over the medium, lowering bandwidth utilization while preserving synchronization precision.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If GPS clocks are deployed in every computing node, then accurate timekeeping is achieved, but cost increases significantly

Engineering Contradiction:
Improvetimekeeping accuracyVSAvoidsystem cost
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent creates a virtual reference clock signal through physical layer sync symbols transmitted over existing network infrastructure. Instead of requiring each node to possess an expensive physical GPS receiver, the system distributes reference time information through copied symbol representations over standard communication channels, achieving comparable synchronization accuracy at fraction of the cost.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces expensive, permanent GPS hardware installations with inexpensive software-based sync symbol processing. The physical layer synchronization mechanism uses lightweight, disposable sync symbols transmitted over existing networks, eliminating the need for costly GPS receivers while providing sufficient timekeeping accuracy for the application requirements.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Adaptability or versatility

If clock sync symbols are inserted at arbitrary locations in symbol streams, then synchronization flexibility is improved, but error-detecting code recalculation may be required

Engineering Contradiction:
Improvesymbol insertion flexibilityVSAvoiderror detection complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts sync symbols as separate entities that can be inserted independently into symbol streams without disrupting the structural integrity of encoded frames. By treating sync symbols as standalone elements rather than integral parts of framed data, the system enables arbitrary insertion locations without requiring recalculation of error-detecting codes, maintaining both flexibility and simplicity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20230299864A1Systems and methods for clock synchronization using special physical layer clock sync symbols
Publication Date: 2023.09.21 HYANNIS PORT RESEARCH INC
  • US20230299864A1 patent drawing
  • US20230299864A1 patent drawing
  • US20230299864A1 patent drawing

AI summary

Systems and methods for clock synchronization are disclosed in which a primary node generates special physical laver clock sync symbols from the output of a reference clock and inserts the clock sync symbols within a symbol stream to one or more secondary nodes. Upon receiving a symbol stream, a secondary node can extract the clock sync symbols from the stream to synchronize its local clock with the reference clock of the primary node. In particular, the clock sync symbols can be inserted into the symbol stream at any arbitrary symbol location, e.g., even between consecutive symbols of a symbol encoded data frame. The clock sync symbols can also replace some control symbols in the symbol stream, such as idle or comma symbols. Accordingly, the clock sync symbols can be inserted into a symbol stream at fixed intervals, irregular intervals, or at any arbitrary time for high resolution clock synchronization.