Physical-Layer HPA Extraction for Low-Latency Memory Access

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Solution Overview

Problem

Existing memory access operations in heterogeneous computing systems incur significant latency due to the processing delays in the receiving protocol stack, which hinders efficient data transfer between host and non-host computing devices.

Innovation Solution

The implementation of early potential host physical address (eHPA) extraction at the physical layer of the receiving protocol stack, allowing for the generation of a valid HPA before the completion of other stack operations, thereby reducing latency by enabling early memory access operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional memory access operations are used with full protocol stack processing, then protocol reliability and error checking are ensured, but memory access latency increases significantly

Engineering Contradiction:
Improveprotocol reliabilityVSAvoidmemory access latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and processes the host physical address (HPA) at the physical layer before the message is fully received and processed by upper protocol layers. This preliminary extraction of address information enables early memory access preparation while the rest of the message is being received, thereby reducing latency without compromising protocol reliability as full protocol processing still occurs subsequently.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If early HPA extraction is implemented at the physical layer, then memory access latency is reduced, but protocol complexity at the physical layer increases

Engineering Contradiction:
Improvememory access latencyVSAvoidphysical layer complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent extracts only the essential HPA information from the message at the physical layer, separating this critical function from the full protocol processing. By taking out just the address extraction capability and implementing it at the physical layer, the system reduces latency without requiring complete protocol stack processing, thus managing complexity effectively.

Inventive Principle:
Principle #2Taking out (Extraction)

3Speed

If HPA is extracted before full message reception, then processing speed increases, but message completeness may be compromised

Engineering Contradiction:
Improveprocessing speedVSAvoidmessage completeness
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs preliminary HPA extraction based on the physical layer signal characteristics before the complete message is processed by upper layers. This allows the system to prepare memory access operations in advance while maintaining message completeness through subsequent full protocol processing and validation steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12505039B1Early potential HPA generator
Publication Date: 2025.12.23 ASTERA LABS INC
  • US12505039B1 patent drawing
  • US12505039B1 patent drawing
  • US12505039B1 patent drawing

AI summary

Symbols are received, from a first computing device by a second computing device, across lanes of a communication link. A physical layer extracted HPA (or eHPA) is generated from the symbols while operations at a physical layer of a receiving (Rx) protocol stack of the second computing device are being performed. The eHPA is generated before other operations at other layers of the Rx protocol stack are finished. The eHPA is used to perform one or more operations for memory access before a normative message is formed by operations of the receiving protocol stack implemented in a communication interface of the second computing device.