Physical-Page Cache Re-Reference Prediction with Dual Reuse Buffers
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Solution Overview
Problem
Conventional cache management policies, such as those based on least recently used (LRU) principles, are less efficient when dealing with irregular accesses to cache lines and often require complex circuitry, limiting their applicability.
Innovation Solution
A cache management system that predicts cache line re-reference intervals using physical page addresses, employing a cache controller that tracks re-reference intervals and assigns priorities to cache lines based on their re-use distances, storing them in 'small re-use' and 'large re-use' page buffers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional LRU-based cache management policies are used, then cache management is simple to implement, but efficiency deteriorates when dealing with irregular accesses to cache lines
Solution Approach 1:
The patent segments the cache management approach by dividing cache lines into groups based on their re-reference interval characteristics. Instead of treating all cache lines uniformly, the system segments them into those with short re-reference intervals and those with long intervals, applying different management strategies to each segment. This segmentation enables more efficient handling of irregular accesses while maintaining manageable complexity through structured organization.
Solution Approach 2:
The patent applies preliminary action by predicting re-reference intervals before cache replacement decisions are made. The system proactively analyzes access patterns and estimates future re-reference intervals, allowing cache management to be optimized in advance rather than reactively. This preliminary prediction enables the system to prepare appropriate management strategies ahead of time, improving efficiency for irregular access patterns.
2Productivity
If LRU-based cache management is used, then implementation is straightforward, but performance deteriorates for irregular access patterns
Solution Approach 1:
The patent implements feedback mechanisms by continuously monitoring actual cache access patterns and comparing them with predicted re-reference intervals. The system uses this feedback to refine and adjust its predictions over time, improving cache hit rates for irregular access patterns. The feedback loop allows the prediction mechanism to adapt to changing access behaviors while maintaining a balance between accuracy and complexity.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting cache management parameters based on predicted re-reference intervals. Instead of using fixed replacement policies, the system varies parameters such as replacement priority and retention time based on the predicted behavior of different cache lines. This dynamic parameter adjustment improves performance for irregular accesses while keeping the underlying mechanism relatively simple.
Data Source
AI summary
Systems, apparatuses, and methods for implementing cache line re-reference interval prediction using a physical page address are disclosed. When a cache line is accessed, a controller retrieves a re-reference interval counter value associated with the line. If the counter is less than a first threshold, then the address of the cache line is stored in a small re-use page buffer. If the counter is greater than a second threshold, then the address is stored in a large re-use page buffer. When a new cache line is inserted in the cache, if its address is stored in the small re-use page buffer, then the controller assigns a high priority to the line to cause it to remain in the cache to be re-used. If a match is found in the large re-use page buffer, then the controller assigns a low priority to the line to bias it towards eviction.