Physically Aware NoC Design Generation from SoC Specifications
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Solution Overview
Problem
Current methods for designing Network on Chip (NoC) systems fail to automatically generate physically aware NoC designs and specifications from System on Chip (SoC) architectural details, physical information, and traffic specifications, leading to conflicts and constraints that cannot be effectively addressed.
Innovation Solution
A method and system for automatically generating physically aware NoC designs and specifications based on SoC architectural details, physical information, traffic specifications, and power profiles, which includes determining the position and configuration of NoC agents, interconnecting channels and interfaces, and assigning power and traffic profiles to ensure efficient NoC architecture and compliance with constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manual NoC design methods are used, then design flexibility is maintained, but design time and complexity increase significantly
Solution Approach 1:
The system enables automatic generation of physically aware NoC designs by having the design tool self-configure NoC agents, channels, and interfaces based on SoC specifications, eliminating the need for manual design intervention while reducing design time and complexity
Solution Approach 2:
The system automatically determines positions, configurations, and parameters of NoC components by processing SoC architectural details, physical information, and traffic specifications, transforming manual design parameters into automated configuration values
2Reliability
If physically unaware NoC designs are generated, then design simplicity is maintained, but conflicts and constraints cannot be resolved
Solution Approach 1:
The system performs preliminary analysis of SoC physical information and traffic specifications before generating NoC designs, pre-determining agent positions and channel configurations to ensure constraint compliance and avoid conflicts in the final design
Solution Approach 2:
The system uses feedback from physical information and traffic specifications to continuously adjust and optimize NoC agent positions, channel configurations, and interface assignments, ensuring that generated designs meet all constraints while maintaining process automation
3Speed
If NoC agents are placed without considering physical information, then placement flexibility is maintained, but performance optimization is reduced
Solution Approach 1:
The system applies local quality optimization by determining specific positions for NoC agents based on their individual traffic patterns, physical locations, and performance requirements, rather than using uniform placement strategies, thereby optimizing communication speed for each agent's specific context
4Extent of automation
If manual configuration of NoC channels and interfaces is performed, then configuration accuracy is maintained, but design automation is reduced
Solution Approach 1:
The design system automatically configures NoC channels and interfaces by self-determining their positions, assignments, and parameters based on SoC specifications, achieving both high automation and accurate configuration without manual intervention
Solution Approach 2:
The system replaces manual mechanical configuration processes with automated computational algorithms that process physical information and traffic specifications to determine optimal channel and interface configurations, achieving both automation and precision
Data Source
AI summary
Different example implementations of the present disclosure relates to methods and computer readable mediums for automatically generating physically aware NoC design and physically aware NoC Specification based on one or more of given SoC architectural details, physical information of SoC, traffic specification, power profile and one or more constraints. The method includes steps of receiving input information, determining the location/position of different NoC agents, interconnecting channels, pins, I/O interfaces, physical/virtual boundaries, number of layers, size/depth/width of different channels at different time, and locating/configuring the different NoC agents, interconnecting channels, pins, I/O interfaces, and physical/virtual boundaries.