Co-Packaging Photonic Integrated Circuits Using Vertical Alignment
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Solution Overview
Problem
The silicon photonic (SiPhot) platform faces limitations due to its CMOS model, which restricts material and fabrication methods, leading to potential poor yield and repeatability when deviating from high control levels, and requires larger footprints compared to traditional CMOS technologies, necessitating innovative approaches for material exploration and vertical stacking to reduce footprint and enhance optical interconnections.
Innovation Solution
The development of companion chips with a multilayer structure comprising a bottom layer, a top layer with a higher index of refraction, and a middle layer with a lower index, featuring vertical alignment pedestals and passive optical alignment, allowing for co-packaging with host chips and enabling vertical stacking and efficient optical and electrical interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If vertical stacking is implemented to reduce footprint, then area is reduced, but alignment precision becomes more difficult to achieve
Solution Approach 1:
Alignment pedestals serve as intermediary structures between the first and second photonic integrated circuits. These pedestals provide mechanical support and precise positioning features that enable accurate vertical alignment during the bonding process, thereby resolving the contradiction between reduced footprint and maintained alignment precision.
Solution Approach 2:
The alignment pedestals are pre-formed on the first photonic integrated circuit before bonding to the second circuit. This preliminary preparation of alignment features ensures that when vertical stacking is implemented, the alignment precision is already established, allowing footprint reduction without sacrificing alignment accuracy.
2Adaptability or versatility
If diverse photonic functions are integrated, then adaptability is improved, but device complexity increases
Solution Approach 1:
The photonic system is divided into separate integrated circuits, each performing specific functions. The first circuit handles certain photonic operations while the second circuit handles others, with optical coupling between them. This segmentation allows diverse photonic functions to be integrated across multiple specialized modules rather than one complex monolithic device.
Solution Approach 2:
The patent transitions from planar integration to vertical three-dimensional stacking. By moving functions into the vertical dimension with multiple layers of photonic circuits, the system achieves higher adaptability and functional integration without proportionally increasing the lateral footprint, effectively managing complexity through spatial reorganization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high-density, low-footprint designs with precise alignment and efficient optical interconnections, reducing signal path length and circuit complexity, while allowing integration of diverse photonic functions that may be challenging with conventional SiPhot platforms.
Implementation Method 1
a middle layer comprising a second material with a second index of refraction lower than the first index of refraction... a top layer comprising a first material with a first index of refraction
Data Source
AI summary
A first photonic integrated circuit (PIC) comprises a first optical element optically coupled to a first coupling region at an edge of the first PIC. A second PIC is formed in part from a multilayer structure comprising a bottom layer, a top layer comprising a first material with a first index of refraction, and a middle layer comprising a second material with a second lower index of refraction and having a first thickness between the bottom and top layers. The second PIC comprises a plurality of vertical alignment pedestals comprising a portion of the middle layer having the first thickness and attached to at least a portion of the bottom layer, a plurality of thinned regions, and a second optical element optically coupled to a second coupling region at an edge of the second PIC. Two or more of the vertical alignment pedestals are adhered to the first PIC.