Photonic Integrated Circuit Co-Packaging with Redistribution Layer
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Solution Overview
Problem
Current photonic integrated circuit (PIC) architectures face challenges in achieving high-density, short-distance interconnections with semiconductor chips while maintaining access for optical fiber coupling.
Innovation Solution
The proposed solution involves a semiconductor package architecture that co-packages a semiconductor chip with one or more photonic integrated circuits, utilizing a redistribution layer structure for electrical pathways and voids in the mold layer for optical coupling, allowing for short distance, high-density interconnects and access for optical fiber.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a photonic integrated circuit is mounted on a substrate with a semiconductor chip using a 2.5D architecture, then the photonic integrated circuit can be coupled to optical fiber and conductor traces, but high density short distance interconnection cannot be achieved
Solution Approach 1:
The patent merges the photonic integrated circuit and semiconductor chip into a single integrated device where the PIC is formed directly on the semiconductor chip substrate. This integration eliminates the need for separate mounting and interconnection structures, achieving both high density and short distance interconnection simultaneously through unified device architecture.
Solution Approach 2:
The patent transitions from a planar 2.5D architecture to a vertical three-dimensional structure where the photonic integrated circuit is formed on the surface and extends into the substrate. This vertical integration enables short distance interconnection by stacking functional layers in the depth dimension while maintaining high density through compact spatial arrangement.
2Length of moving object
If the photonic integrated circuit is tightly integrated with the semiconductor chip, then short distance interconnection is achieved, but the photonic integrated circuit cannot remain accessible for interfacing with optical fiber
Solution Approach 1:
The patent segments the device into distinct functional regions: an active area where the photonic integrated circuit is formed on the semiconductor chip for short distance interconnection, and a peripheral area where optical coupling structures are provided for external optical fiber interfacing. This spatial segmentation allows both tight integration and external accessibility to coexist.
Solution Approach 2:
The patent introduces optical coupling structures as intermediary elements between the integrated photonic circuit and external optical fibers. These coupling structures are positioned at the periphery of the device, acting as mediators that enable external optical fiber interfacing without disrupting the tight integration and short distance interconnection of the core photonic circuit with the semiconductor chip.
3Productivity
If the photonic integrated circuit is formed on the semiconductor chip, then high density interconnection is achieved, but the device complexity increases
Solution Approach 1:
The patent employs the semiconductor chip substrate to serve multiple functions: as the mechanical support structure, as the electrical interconnection medium, and as the formation substrate for the photonic integrated circuit. This multi-functionality reduces the need for separate components and interconnection structures, thereby achieving high density interconnection while managing device complexity through unified material and process utilization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture enables efficient data transmission through light signals while maintaining short electrical pathways, thereby enhancing performance and efficiency in high-performance applications.
Implementation Method 1
data to be conveyed through light signals to and from the semiconductor device over optical fiber
Implementation Method 2
removing one or more portions of the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface
Data Source
AI summary
A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.