Semiconductor Package Layout for Stable PIC-EIC Optical Integration
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Solution Overview
Problem
Existing semiconductor packages face challenges in achieving miniaturization, weight reduction, and integration of multiple elements while maintaining structural stability and optical characteristics, with complex manufacturing processes.
Innovation Solution
A semiconductor package design incorporating a photonic integrated circuit (PIC) chip, an electronic integrated circuit (EIC) chip, a support block, a molding layer, and a micro-lens layer, with bonding and thinning processes to enhance structural stability and optical characteristics, and a simplified manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple elements are integrated into one package to achieve miniaturization and weight reduction, then the size and weight of electronic components are reduced, but the structural stability and manufacturing complexity increase
Solution Approach 1:
The package is divided into distinct functional modules: a substrate, a photonic integrated circuit (PIC) chip mounted on the substrate, an electronic integrated circuit (EIC) chip mounted on the PIC chip, and a support block bonded to the PIC chip. This segmentation allows each component to be optimized independently while maintaining overall structural stability despite the compact integrated design.
2Volume of moving object
If multiple elements are integrated into one package to achieve miniaturization, then the size of electronic components is reduced, but the manufacturing process complexity increases
Solution Approach 1:
The PIC chip and EIC chip are mounted in a predetermined stacked configuration before final package assembly. The support block is pre-bonded to the PIC chip at a specific location spaced apart from the EIC chip. This preliminary arrangement of components simplifies the overall manufacturing process by establishing the structural framework early, reducing the complexity of subsequent assembly steps.
3Strength
If a molding layer completely surrounds the chips and support block, then structural protection is improved, but light transmission and optical characteristics deteriorate
Solution Approach 1:
The molding layer is applied selectively rather than uniformly across the entire package surface. It covers the substrate and surrounds the EIC chip and support block for structural protection, but deliberately leaves the upper surface of the support block exposed. This localized application maintains structural integrity where needed while preserving optical characteristics in regions requiring light transmission.
4Illumination intensity
If material layers are removed to improve light transmission, then optical characteristics are improved, but structural stability may deteriorate
Solution Approach 1:
The molding layer is extracted or removed from specific regions where it would interfere with optical performance. Specifically, the upper surface of the support block is left uncovered by the molding layer, creating an open optical path. This selective removal improves light transmission to the sensor portion while the molding layer remains in other areas to provide structural protection and support.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design provides improved structural stability, optical characteristics, and simplified manufacturing, reducing material layers for better light transmission and minimizing light loss, while enabling efficient integration of multiple elements.
Implementation Method 1
a first transparent adhesive layer between a lower surface of the micro-lens layer and an upper surface of the molding layer, and between the lower surface of the micro-lens layer and an upper surface of the support block
Implementation Method 2
a micro-lens layer on the molding layer, the first chip, and the support block
Implementation Method 3
bonding a support block on the first chip such that the support block is located on the sensor portion of the first chip; forming a first insulating layer on the active surface of the first chip, forming a second insulating layer on a lower surface of the support block, and bringing the first chip and the support block into contact such that the first insulating layer and the second insulating layer are in contact with each other on the sensor portion
Implementation Method 4
performing a thinning process on the molding layer to expose an upper surface of the support block
Data Source
AI summary
Provided is a semiconductor package including a substrate, a first chip on the substrate and including a photonic integrated circuit (PIC), a second chip on the first chip and including an electronic integrated circuit (EIC), a support block spaced apart from the second chip and bonded to an upper surface of the first chip, a molding layer on the first chip and at least partially surrounding the second chip and the support block, with an upper surface of the support block free of the molding layer, a micro-lens layer on the molding layer, the first chip, and the support block, and a first transparent adhesive layer between a lower surface of the micro-lens layer and an upper surface of the molding layer, and between the lower surface of the micro-lens layer and the upper surface of the support block.