Photonic Integrated Circuit Packages with Glass Core Substrates

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Solution Overview

Problem

Current packaging technologies for photonic integrated circuits (PICs) face challenges in achieving high-density, high-bandwidth electrical connections while maintaining optical access, leading to increased manufacturing complexity and cost due to the need for parallel tight-pitch interconnects and the exposure of PICs for fiber coupling, which limits the density of electrical interconnects and footprint efficiency.

Innovation Solution

The use of a substrate with a glass core and a dielectric material including conductive pathways, where a photonic integrated circuit (PIC) is electrically coupled to the conductive pathways and optically coupled through a first optical component along the perimeter of the glass core, allowing for efficient electrical and optical connections with improved z-height offsets and reduced signal loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If PICs are exposed for fiber coupling, then optical access is achieved, but electrical interconnect density is limited and footprint efficiency decreases

Engineering Contradiction:
Improveoptical accessVSAvoidelectrical interconnect density
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent moves the optical coupling interface from the planar surface (2D) to the lateral edge (3D dimension) of the PIC package. Optical fibers are coupled to the side of the package through lateral waveguides, allowing optical access without compromising the top surface for electrical interconnects. This dimensional transition enables both high-density electrical connections on the top surface and optical coupling through the side edges simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If parallel tight-pitch interconnects are used, then electrical connection bandwidth is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveelectrical connection bandwidthVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary substrate layer between the PIC and the package housing that provides the tight-pitch electrical interconnect structure. This intermediate layer acts as a mediator that handles the complex routing and high-density connections, isolating the manufacturing complexity from both the PIC fabrication and the final package assembly. The intermediary structure enables high bandwidth electrical connections while simplifying the overall manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If PICs are exposed for fiber coupling, then optical access is achieved, but footprint efficiency decreases

Engineering Contradiction:
Improveoptical accessVSAvoidfootprint efficiency
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent transitions the optical coupling from a surface-based approach (occupying valuable planar footprint) to an edge-based approach (utilizing the package perimeter). By routing optical signals through lateral waveguides at the package edges and coupling fibers to the side, the design efficiently uses the three-dimensional space without consuming additional footprint area on the top surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240176085A1Photonic integrated circuit packages including substrates with glass cores
Publication Date: 2024.05.30 INTEL CORP
  • US20240176085A1 patent drawing
  • US20240176085A1 patent drawing
  • US20240176085A1 patent drawing

AI summary

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a photonic assembly may include a substrate having a core with a surface, wherein a material of the core includes glass; and a dielectric material on a portion of the surface of the core, the dielectric material including conductive pathways; a photonic integrated circuit (PIC) electrically coupled to the conductive pathways in the dielectric material; a first optical component between the PIC and the surface of the core, wherein the first optical component is along a perimeter of the core; and a second optical component coupled to the first optical component, wherein the second optical component is optically coupled to the PIC by an optical pathway through the first optical component.