Undercut Air Trenches for Thermal Efficiency in Photonic Integrated Circuits
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Solution Overview
Problem
Photonic integrated circuit (PIC) architectures face limitations in thermal efficiency due to restricted undercut size caused by overlap between bump pads and air trenches, leading to unreliable mechanical structures and inefficient heat management around micro ring resonators (MRRs).
Innovation Solution
Implementing a set of air trenches surrounding the MRRs, including both rectangular and square shapes, to increase the undercut size without interfering with bump pads, providing enhanced thermal insulation and reducing heat transfer to the substrate, thereby improving thermal efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the air trench size is increased to improve thermal efficiency, then thermal insulation performance is improved, but the mechanical structure becomes unreliable due to overlap with bump pads
Solution Approach 1:
The air trench is divided into multiple segments: a first air trench extending from the top surface to a first depth, and a second air trench extending from the top surface to a second depth greater than the first depth. This segmentation allows the undercut to extend beneath bump pads in specific regions without compromising mechanical integrity, as the segmented structure provides staged thermal isolation rather than continuous undercutting.
Solution Approach 2:
Different regions of the PIC device have different undercut depths tailored to their specific requirements. The second air trench creates a deeper undercut in regions where thermal isolation is critical, while the first air trench provides shallower undercut in regions where bump pad mechanical support is needed. This local differentiation optimizes thermal efficiency without sacrificing overall structural reliability.
2Temperature
If the undercut size is increased to reduce heat transfer, then thermal decoupling is improved, but the mechanical structure becomes unreliable due to bump pad overlap
Solution Approach 1:
The undercut structure is segmented into two depth levels using first and second air trenches. This allows thermal decoupling to be enhanced in specific local regions through the deeper second air trench, while maintaining mechanical reliability in other regions through the shallower first air trench that preserves bump pad support.
Solution Approach 2:
The solution transitions from a two-dimensional planar undercut to a three-dimensional multi-level undercut structure. By varying the depth dimension of air trenches across different locations, the patent achieves enhanced thermal decoupling in critical areas while maintaining mechanical integrity in bump pad regions, effectively adding a depth dimension to the undercut design.
3Use of energy by moving object
If the air trench extends deeper to improve thermal insulation, then energy efficiency is improved, but the mechanical support from bump pads is compromised
Solution Approach 1:
The air trench system is segmented into two depth levels, with the second air trench extending deeper than the first. This segmentation enables enhanced thermal insulation and energy efficiency in regions where the deeper second trench is implemented, while maintaining adequate mechanical support in regions served by the shallower first air trench that preserves bump pad integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves better thermal efficiency for PIC architectures, reducing the energy required to heat MRRs and maintaining mechanical stability by maximizing the undercut size without encroaching on the bump pads, resulting in improved thermal decoupling and reduced energy consumption.
Implementation Method 1
an undercut below the MRR can prevent heat from being transferred from the MRR to the PIC die substrate
Data Source
AI summary
In one embodiment, a photonic integrated circuit (PIC) device includes conductive pads on a surface of the PIC and a micro ring resonator (MRR) with a heater element centrally located between the conductive pads. The PIC also includes a cavity defined within a substrate of the PIC below the MRR, and a plurality of holes defined between the MRR and the conductive pads. The holes extend from a top surface of the PIC into the cavity, and each hole is between a respective conductive pad and the MRR.