PIC Hosting Wafer with V-Groove Fiber Alignment and Co-Packaging
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Solution Overview
Problem
Existing technologies are limited in providing a multifunctional and flexible solution for high-throughput dense photonic integrated circuit (PIC) packaging, particularly in managing optical fiber alignment, electrical coupling, and thermal management, which are crucial for high-frequency performance and miniaturization.
Innovation Solution
A multifunctional self-sustained hosting apparatus with integrated V-grooves and cavities on a processed wafer, allowing for optical alignment of optical fibers and chipsets, flexible electrical connections, and thermal management, using angled V-groove configurations to minimize optical coupling loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete components are used for optical alignment and thermal management, then each component can be optimized independently, but the overall device complexity increases and integration density decreases
Solution Approach 1:
The patent combines optical alignment functionality (V-grooves), thermal management (heat sinks, thermal vias), electrical interconnection (wire bonds, BGA), and structural support into a single integrated hosted wafer. This merging eliminates the need for separate discrete components for each function, reducing overall device complexity while maintaining the precision of each individual function through dedicated structural features.
Solution Approach 2:
The hosted wafer structure serves multiple functions simultaneously: it provides optical alignment through V-grooves, thermal management through integrated heat dissipation structures, electrical interconnection through wire bond regions and BGA pads, and mechanical support for multiple chipsets. This multi-functionality reduces the total component count and enables higher integration density.
2Productivity
If multiple chipsets are integrated on a single wafer, then integration density increases, but the difficulty of optical and electrical alignment increases
Solution Approach 1:
The V-grooves and wire bond regions are pre-formed on the hosted wafer during wafer-level processing, establishing precise alignment references before the chipsets are mounted. This preliminary action ensures that when multiple chipsets are integrated, they automatically align to the correct positions without requiring complex post-assembly adjustments, thus maintaining high manufacturing precision despite increased integration density.
Solution Approach 2:
The hosted wafer acts as an intermediary platform that provides a common reference frame for multiple chipsets. Through its pre-formed V-grooves and electrical connection structures, it mediates the alignment between chipsets and external optical/electrical components, enabling accurate alignment even when multiple chipsets are integrated on a single wafer.
3Manufacturing precision
If passive alignment structures are used for optical fibers, then alignment precision is achieved, but flexibility to accommodate arbitrary orientations is reduced
Solution Approach 1:
The patent segments the alignment functionality by providing separate V-groove structures for optical fiber alignment and separate wire bond/BGA regions for electrical connection. This segmentation allows optical fibers to be passively aligned to specific chipsets while other chipsets can be oriented arbitrarily and connected through the electrical interconnection structures, thus maintaining both alignment precision and orientation flexibility.
Solution Approach 2:
The hosted wafer structure provides a dynamic configuration capability where the relative positions and orientations of multiple chipsets can be adjusted within the constraints of the pre-formed V-grooves and electrical connection regions. This allows the system to adapt to different chipset orientations while maintaining precise optical alignment where required, through the flexible arrangement of multiple independent alignment and connection zones.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-throughput dense PIC packaging with flexible orientation and alignment of multiple chipsets and optical fibers, ensuring low-loss optical coupling and precise thermal management, thereby enhancing signal integrity and frequency performance.
Implementation Method 1
V-groove (3), which is formed on the top surface of the processed wafer (1) or in a submount (10)... said V-groove (3) is configured for receiving at least an in/out optical fiber (7) and optically align said in/out optical fiber (7) with an optical endface of a chipset (8)
Implementation Method 2
at least a cavity (2) embedded on a top surface of the processed wafer (1), wherein the cavity (2) is configured to receive at least one from the group consisting of a chipset (9) and an optical lens (15)
Data Source
AI summary
The invention refers to a multifunctional self-sustained hosting apparatus for photonic integrated circuit and/or related chipset system packaging comprising a processed wafer (1); and at least a cavity (2), wherein said cavity (2) is configured to receive a chipset or an optical lens; and at least a V-groove (3), which is configured for receiving at least an in/out optical fiber and optically align said optical fiber with an optical endface of a chipset. The invention also refers to a bidirectional optical sub assembly based on photonic integrated circuit, which comprises said hosting apparatus.The hosting apparatus enables PIC&IC co-packaging allowing to answer current and future requirements in diverse PIC applications. The apparatus provides electrical interconnections using direct-current lines and radio frequency lines, and may host a plurality of chipsets with different dimensions and orientations, providing a high-precision optical coupling between arrays of optical fibers and optical endface of chipsets.