Pick Unit Dynamic Slot Assignment for Superscalar Instruction Dispatch
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Solution Overview
Problem
Superscalar processors face challenges in maintaining the program order of instructions during concurrent transmission, leading to complex rotation mechanisms and uneven resource utilization across slots, which affects parallelism and implementation complexity.
Innovation Solution
An instruction buffer and a pick unit that select and transmit instructions to symmetrical slots, where the oldest instruction is sent to a slot consecutive to the youngest instruction's slot in the previous transmission, allowing other instructions to be transmitted to consecutive slots, thereby balancing load and simplifying implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a static program order assignment is used among parallel decoders, then program order can be discerned, but slot 0 resources are over-utilized and achieve less parallelism
Solution Approach 1:
The patent implements dynamic slot assignment where the destination slot for the oldest instruction is determined by the youngest instruction's slot number from the previous cycle. This dynamic approach redistributes instructions across slots based on previous transmission patterns, preventing permanent concentration of resources at slot 0 and enabling better load balancing while maintaining program order discernment.
2Reliability
If a rotation mechanism is used to align the first instruction to slot 0, then program order is maintained, but implementation complexity increases
Solution Approach 1:
The patent extracts the rotation mechanism from the instruction transmission process by eliminating the need for complex rotation logic. Instead of rotating instructions to align with slot 0, the system directly assigns the oldest instruction to a dynamically determined slot based on the youngest instruction's previous slot, simplifying the implementation while maintaining program order integrity.
Solution Approach 2:
Rather than rotating instructions to achieve slot 0 alignment, the patent inverts the approach by determining the destination slot based on the youngest instruction's slot number. This inversion eliminates the need for rotation mechanisms and simplifies the transmission logic while still maintaining proper program order.
3Productivity
If more resources are assigned to slot 0, then the first instruction can be processed, but the implementation becomes more complex due to slot differences
Solution Approach 1:
The patent applies local quality by allowing each slot to have identical resource configurations while achieving different functional roles through dynamic instruction assignment. Instead of giving slot 0 more resources, the system uses uniform slot resources with intelligent scheduling to achieve proper instruction processing distribution.
Data Source
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AI summary
In one embodiment, a processor (10) comprises an instruction buffer (20) and a pick unit (26). The instruction buffer (20) is coupled to receive instructions fetched from an instruction cache (14). The pick unit (26) is configured to select up to N instructions from the instruction buffer (20) for concurrent transmission to respective slots of a plurality of slots (34A-34D), where N is an integer greater than one. Additionally, the pick unit (26) is configured to transmit an oldest instruction of the selected instructions to any of the plurality of slots (34A-34D) even if a number of the selected instructions is greater than one. The pick unit (26) is configured to concurrently transmit other ones of the selected instructions to other slots of the plurality of slots (34A-34D) based on the slot to which the oldest instruction is transmitted.