Piezoelectric Layer Transfer With Low-Temperature Dielectric Bonding

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Solution Overview

Problem

Existing methods for manufacturing piezoelectric structures for radiofrequency devices face issues such as significant deformation due to thermal expansion coefficient differences between piezoelectric and support substrates, leading to poor adhesion, curvature, and mechanical instability during thinning and packaging steps.

Innovation Solution

A low-temperature dielectric bonding layer is used to ensure mechanical stability during thinning and packaging, with molecular bonding and low-pressure assembly, followed by etching and polishing to achieve a rough surface for RF wave reflection, and a weakening zone for controlled separation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a piezoelectric layer is grown directly on a substrate in a CMOS clean room, then manufacturing integration is improved, but contamination of the piezoelectric layer occurs due to particulates and chemicals in the clean room environment

Engineering Contradiction:
Improvemanufacturing integrationVSAvoidcontamination
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary transfer process where the piezoelectric layer is grown on a separate handle wafer in a dedicated epitaxial workshop, then transferred to the CMOS substrate in a clean room. This intermediary handle wafer acts as a mediator that protects the piezoelectric layer from clean room contamination while enabling integration with CMOS substrates.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The manufacturing process is segmented into two distinct parts: piezoelectric layer growth in a dedicated epitaxial workshop on a handle wafer, and subsequent transfer to the CMOS substrate in a clean room. This segmentation allows each process to occur in its optimal environment without contamination risks.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If transfer of the piezoelectric layer is implemented, then contamination is prevented, but device complexity increases due to additional transfer steps

Engineering Contradiction:
ImprovecontaminationVSAvoidprocess complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The handle wafer serves as an intermediary carrier that simplifies the transfer process. By growing the piezoelectric layer on this dedicated substrate first, the transfer to the final CMOS substrate becomes a controlled, single-step process using standard semiconductor techniques, rather than attempting direct growth on the final substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If direct growth on substrate is used, then process complexity is reduced, but manufacturing precision deteriorates due to contamination affecting layer quality

Engineering Contradiction:
Improveprocess complexityVSAvoidlayer quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The process is divided into a high-precision growth stage in a controlled epitaxial environment and a separate transfer stage in the clean room. This segmentation ensures that the sensitive piezoelectric layer growth occurs without contamination risks, while the transfer process uses established semiconductor manufacturing techniques to maintain precision.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method provides stable mechanical strength and reduces deformation, enabling efficient transfer and integration of piezoelectric layers with improved adhesion and reduced defects, suitable for microelectronics applications.

Implementation Method 1

a low-temperature dielectric bonding layer is deposited on a single face of the piezoelectric material substrate before the assembly step; The low-temperature dielectric bonding layer ensures sufficient mechanical stability

Methodology Applied
Scientific EffectMolecular bonding: Chemical Bonding

Implementation Method 2

the surface of the piezoelectric layer located at the interface with the intermediate bonding layer is sufficiently rough to allow reflection of parasitic waves in all directions

Methodology Applied
Scientific EffectWave reflection: Reflection

Implementation Method 3

the dielectric bonding layer comprises a silicon oxide layer deposited on the piezoelectric material substrate by plasma-enhanced chemical vapor deposition

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 4

forming a weakening zone in the layer of piezoelectric material so as to delimit the piezoelectric layer to be transferred; fracturing and separating the piezoelectric structure along the weakening zone

Methodology Applied
Scientific EffectFracture mechanics: Fracture Mechanics

Data Source

PatentEP4128380B1Method of manufacturing a piezoelectric structure for a radio frequency device which is used for the transfer of a piezoelectric layer, and method of transferring such a piezoelectric layer
Publication Date: 2025.06.25 SOITEC SA
  • EP4128380B1 patent drawingFigure 1
  • EP4128380B1 patent drawingFigure 2
  • EP4128380B1 patent drawingFigure 3

AI summary

A process for manufacturing a piezoelectric structure (10, 10'), said process being characterized in that it comprises providing a substrate of piezoelectric material (20), providing a carrier substrate (100), depositing a dielectric bonding layer (1001) at a temperature lower than or equal to 300°C on a single side of the substrate of piezoelectric material (20), a step (1') of joining the substrate of piezoelectric material (20) to the carrier substrate (100) via the dielectric bonding layer (1001), a thinning step (2') for forming the piezoelectric structure (10, 10'), which comprises a layer of piezoelectric material (200) joined to a carrier substrate (100).