Piezoelectric Touchscreen Pixel Segmentation for Energy Harvesting
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Solution Overview
Problem
Piezoelectric touchscreens face challenges in achieving self-powering due to parasitic capacitance issues, which result in low energy and voltage output when stress is applied non-uniformly across large areas, making it impractical to implement diodes for each pixel in large-scale touch panels.
Innovation Solution
The solution involves dividing the generator area into autonomous 'pixels' with their own rectifying circuitry, reducing the capacitance of the piezoresistive layer relative to the piezoelectric convertor layer, and using a crossbar architecture to connect piezoresistive electrodes, allowing for efficient charge flow and identification of stressed electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If diodes are implemented for each pixel in large-scale touch panels, then rectifying capability is improved, but device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent divides the large-scale touch panel into smaller pixel groups, each served by a shared rectifying circuit rather than individual diodes per pixel. This segmentation approach maintains adequate rectifying capability for each group while dramatically reducing the total number of diodes required, thus lowering device complexity and manufacturing cost.
Solution Approach 2:
The patent implements shared rectifying circuits that serve multiple pixels within a pixel group. Each rectifying circuit performs the same rectifying function for multiple pixels, providing multi-functionality that reduces the overall number of components needed while maintaining the necessary rectifying capability across the entire touch panel.
2Measurement precision
If stress is applied non-uniformly across large areas, then touch sensitivity is improved, but energy and voltage output decrease due to parasitic capacitance
Solution Approach 1:
The patent divides the large piezoelectric convertor layer into multiple smaller pixel groups, each with its own piezoresistive layer. This segmentation reduces the parasitic capacitance associated with each individual pixel group, allowing non-uniform stress application to maintain both touch sensitivity and adequate energy/voltage output by preventing the cumulative parasitic capacitance effect that would occur in a single large-area design.
3Power
If piezoresistive layer capacitance is reduced, then energy harvesting efficiency is improved, but charge flow control capability may be compromised
Solution Approach 1:
The patent optimizes the capacitance of the piezoresistive layer to a specific range that balances energy harvesting efficiency with charge flow control capability. By carefully selecting and adjusting the piezoresistive material properties and layer thickness, the design achieves reduced parasitic capacitance for improved energy harvesting while maintaining sufficient capacitance to ensure proper charge flow control and signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient energy harvesting and voltage output, even with non-uniform stress distribution, by isolating parasitic capacitors and optimizing resistance and capacitance, thus enabling self-powered touchscreens.
Implementation Method 1
Piezoelectricity is the electric charge that accumulates in certain solid materials (notably crystals, and certain ceramics) in response to applied mechanical stress. The piezoelectric effect may provide internal generation of electrical charge resulting from an applied mechanical force.
Implementation Method 2
The piezoresistive effect describes change in electrical resistivity of a member when mechanical stress is applied. In contrast to the piezoelectric effect, the piezoresistive effect only causes a change in electrical resistance; not in electric potential.
Data Source
Figure 1~2
Figure 3A~3B
Figure 4A~4B
AI summary
An apparatus including a piezoelectric convertor layer (312); at least one piezoresistive layer (313) on the piezoelectric convertor layer (312); and electrical conductor outputs. The at least one piezoresistive layer (313) includes a plurality of spaced apart piezoresistive electrodes (314). The apparatus is configured such that when the piezoelectric convertor layer (312) is deformed to generate a charge, at least one of the piezoresistive electrodes (314) is stressed, where the at least one piezoresistive layer (313) is configured to control flow of charge from the piezoelectric convertor layer (312). The electrical conductor outputs are electrically connected to the piezoresistive electrodes (314). The outputs are configured to allow the charge from the piezoelectric convertor layer (312) to flow out of the piezoresistive electrodes (314). The electrical conductor outputs are configured relative to the piezoresistive electrodes (314) to allow identification of the at least one piezoresistive electrode (314) which has been stressed based upon the charge on at least one of the electrical conductor outputs.