Semiconductor Pillar Contact Plug for DRAM Integration
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Solution Overview
Problem
The existing two-dimensional array structure of dynamic random access memories (DRAMs) limits further integration and development, as no significant increase in memory cell density can be achieved without adopting a three-dimensional or vertically extending structure.
Innovation Solution
A semiconductor device with a pillar structure is developed, featuring upper and lower diffusion layers and a conductor with reduced contact resistance, where the contact plug covers the entire top surface of the pillar, enhancing contact area and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a two-dimensional array structure is adopted for DRAM memory cells, then the device can be manufactured with existing lithography techniques, but the degree of integration and memory cell density cannot be substantially increased
Solution Approach 1:
The patent transitions from a two-dimensional array structure to a three-dimensional pillar structure, where memory cells are formed vertically extending pillars with gate electrodes wrapping around the channel region. This dimensional change enables increased memory cell density without being constrained by planar lithography resolution limits, as the vertical dimension provides additional integration space.
2Reliability
If the contact plug area is increased to reduce contact resistance, then the contact resistance with the upper diffusion layer is reduced, but the area available for other structures is decreased
Solution Approach 1:
The patent applies different materials with varying properties to different regions of the contact plug structure. A first contact plug material with low contact resistance (such as copper or aluminum) is used in the region contacting the upper diffusion layer, while a second contact plug material (such as tungsten or cobalt) is used in the upper region. This local differentiation optimizes contact resistance without requiring the entire contact plug area to be maximized.
Solution Approach 2:
The contact plug is constructed as a composite structure with at least two different contact plug materials. The first material layer is positioned to contact the upper diffusion layer and is selected for low contact resistance, while the second material layer is positioned above it. This composite approach combines the advantages of different materials to achieve both low contact resistance and efficient space utilization.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a first diffusion region, a gate insulating film, a gate electrode, a second diffusion region and a contact plug. The semiconductor substrate includes a base and at least a pillar. The first diffusion region is disposed in the base. The gate insulating film covers a side surface of the pillar. The gate electrode is separated from the pillar by the gate insulating film. The second diffusion region is disposed in an upper portion of the pillar. The contact plug is connected to the second diffusion region. The contact plug is connected to the entirety of the top surface of the pillar.