Semiconductor Pillar Diodes via Inversion Fabrication
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Solution Overview
Problem
In semiconductor pillar device fabrication, existing methods face challenges such as undercutting during etching, limited pillar height due to soft photoresist masks, and processing difficulties with high aspect ratio openings, which can lead to shorting of diode regions and inefficient semiconductor material removal.
Innovation Solution
The method involves forming tungsten nitride barriers by nitriding tungsten electrodes, selectively depositing conductive barriers, and using precise silicon recess etches to control semiconductor layer formation, ensuring proper alignment and adhesion of insulating layers to prevent shorting and optimize semiconductor device structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a subtractive method is used to fabricate pillar devices by etching semiconductor layers, then semiconductor pillars can be formed, but undercutting of the pillar base occurs during etching which makes pillars susceptible to falling over
Solution Approach 1:
The patent inverts the conventional subtractive approach by using a additive method where semiconductor layers are deposited conformally on sacrificial pillars and then the sacrificial material is removed. This leaves the semiconductor material in place to form stable pillars, avoiding the undercutting problem entirely. The process goes from removing material to adding material, fundamentally changing the fabrication paradigm.
Solution Approach 2:
The patent employs preliminary action by forming sacrificial pillars first, then depositing semiconductor material conformally on them before removing the sacrificial material. This sequence ensures that the semiconductor material is already in position and adhered to the structure before the sacrificial pillars are removed, preventing any instability or undercutting issues.
2Length of moving object
If thin and soft photoresist is used as the etching mask for smaller pillar devices, then etching can be performed, but the pillar height is limited due to mask constraints
Solution Approach 1:
The patent uses sacrificial pillars as intermediary structures that enable the formation of high aspect ratio openings. These sacrificial pillars serve as temporary supports during the gap fill process, allowing the deposition of thick insulating material without requiring complex photoresist masks. After the insulating material is deposited and planarized, the sacrificial pillars are removed, leaving the desired high aspect ratio structures.
3Reliability
If gap fill dielectric material is deposited in between and on top of pillars with high aspect ratio openings, then insulation is provided, but the oxide gap filling step presents processing challenges
Solution Approach 1:
The patent performs preliminary action by depositing the insulating material conformally on the sacrificial pillars and planarizing the surface before removing the sacrificial material. This ensures that the gap fill dielectric is already in place and properly formed before the final structure is revealed, eliminating the processing challenges associated with filling high aspect ratio openings.
Solution Approach 2:
The patent segments the fabrication process into distinct stages: forming sacrificial pillars, depositing insulating material conformally, planarizing the surface, and finally removing the sacrificial material. This segmentation allows each step to be optimized independently, making the overall process more manageable and reliable compared to attempting to fill high aspect ratio openings in a single step.
4Manufacturing precision
If CMP or etchback is used to planarize the gap fill dielectric with the upper surface of pillars, then planarity is achieved, but a significant thickness of deposited semiconductor material is removed
Solution Approach 1:
The patent inverts the conventional approach by planarizing the surface before removing the sacrificial material, rather than removing material after planarization. This ensures that the maximum amount of semiconductor material is retained, as the planarization step occurs when the sacrificial pillars are still in place supporting the structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents shorting between diode regions, allows for precise control of semiconductor layer formation, and enhances the stability and efficiency of semiconductor pillar device fabrication, particularly for smaller pillar devices with high aspect ratios.
Implementation Method 1
nitriding the tungsten electrodes to form tungsten nitride barriers on the plurality of tungsten electrodes
Data Source
AI summary
A method of making a semiconductor device includes providing an insulating layer containing a plurality of openings, forming a first semiconductor layer in the plurality of openings in the insulating layer and over the insulating layer, and removing a first portion of the first semiconductor layer, such that first conductivity type second portions of the first semiconductor layer remain in lower portions of the plurality of openings in the insulating layer, and upper portions of the plurality of openings in the insulating layer remain unfilled. The method also includes forming a second semiconductor layer in the upper portions of the plurality of openings in the insulating layer and over the insulating layer, and removing a first portion of the second semiconductor layer located over the insulating layer. The second conductivity type second portions of the second semiconductor layer remain in upper portions of the plurality of openings in the insulating layer to form a plurality of pillar shaped diodes in the plurality of openings.