Pillar-Structured MIM Capacitor for High-Density BEOL Capacitance
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Solution Overview
Problem
Conventional MIM capacitor fabrication methods face challenges such as the need for multiple masks, reliability issues with copper in back-end-of-line metal lines and vias, limited surface area, and susceptibility to plasma damage, which hinder capacitance density and yield improvement.
Innovation Solution
The MIM capacitor design incorporates a bottom electrode with vertical pillars formed using existing metal layers through subtractive patterning, utilizing materials like ruthenium, tungsten, and iridium, which reduces series resistance and avoids plasma damage, and features a comb-shaped structure for increased surface area and capacitance, with a high-k liner and top electrode formed using damascene techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional stacking methods are used to fabricate MIM capacitors, then multiple MIM capacitor layers can be formed, but the process complexity increases with numerous lithography and etching steps
Solution Approach 1:
The patent combines multiple capacitor formation operations into a single planar structure. Instead of stacking multiple MIM capacitor layers requiring separate lithography and etching steps, the invention forms one MIM capacitor with a planar bottom electrode that achieves equivalent or superior capacitance density, thereby reducing fabrication process complexity while maintaining or improving quantity of substance.
2Reliability
If copper is used in back-end-of-line metal lines and vias, then conductivity is improved, but reliability issues arise due to plasma damage susceptibility
Solution Approach 1:
The patent replaces copper with ruthenium in the bottom electrode material composition. Ruthenium provides comparable or superior conductivity while exhibiting significantly enhanced resistance to plasma damage during back-end-of-line processing. This material substitution converts the harmful susceptibility of copper to plasma damage into a beneficial property of ruthenium, thereby improving reliability without sacrificing conductivity.
3Quantity of substance
If conventional MIM capacitor designs are used, then fabrication is simpler, but surface area is limited reducing capacitance density
Solution Approach 1:
The patent transitions from vertical stacking to a planar extended structure. The bottom electrode is configured as a planar shape with extended surface area in the lateral dimensions rather than increasing height through multiple stacked layers. This dimensional approach allows significantly increased capacitance density by maximizing the electrode-s dielectric interface area within the planar constraint, effectively utilizing another dimension (lateral expansion) to overcome surface area limitations.
Data Source
AI summary
A semiconductor device including a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry, where a bottom electrode of the MIM capacitor includes a plurality of vertical pillars extending up from a bottom layer. A semiconductor device including a metal insulator metal capacitor (MIM capacitor), where a bottom electrode of the MIM capacitor includes a plurality of vertical pillars extending up from a bottom layer. Forming back end of line Mx-1 metal line layer, forming a plurality of Vx-1 via on the Mx-1 metal line layer, forming Mx metal line layer with subtractive patterning on the plurality of the Vx-1 via, forming a plurality of Vx via on the Mx metal line layer with subtractive patterning; and forming a block mask protecting a portion of the semiconductor device.