Semiconductor Pillar Pattern Protection During Word Line Fabrication
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Solution Overview
Problem
The existing method for fabricating semiconductor devices with vertical channels faces issues of excessive loss of sidewall protection layers and potential short circuits due to the use of wet etch processes, leading to exposure of pillar patterns and accidental removal of capping layers on separation layers.
Innovation Solution
A method involving the formation of a first capping layer to protect the gate electrodes, followed by a sacrificial layer and a second capping layer on sidewalls, which allows for selective removal of the sacrificial layer and formation of a word line without exposing the pillar patterns, preventing undesirable loss and short circuits by using dry etch processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wet etch process is used to remove the capping layer, then the capping layer can be removed effectively, but the sidewall protection layer is excessively lost and pillar patterns may be exposed
Solution Approach 1:
The capping layer removal process is segmented into two distinct steps: first removing the capping layer from the substrate surface, then selectively removing it from sidewalls using the exposed sidewall protection layer as a mask. This segmentation allows precise control over which areas have the capping layer removed, preventing excessive loss and pillar pattern exposure.
Solution Approach 2:
The sidewall protection layer is formed in advance before capping layer removal, creating a protective mask that prevents etchant from attacking the pillar patterns. This preliminary protective action ensures that even when capping layer removal is performed, the critical pillar structures remain intact.
2Ease of manufacture
If wet etch process is used to remove the capping layer, then the capping layer can be removed effectively, but the capping layer on separation layer may be accidentally removed causing short circuits
Solution Approach 1:
The etching process is made selective to different locations: the capping layer on the substrate surface is removed first, while the capping layer on the separation layer is preserved due to the protective effect of the separation layer structure. This local differentiation prevents accidental removal and subsequent short circuits between buried bit lines and word lines.
Solution Approach 2:
The separation layer acts as an intermediary protective structure between the capping layer and the underlying bit line regions. By forming the separation layer with appropriate material properties and positioning, it mediates the etching process to prevent direct exposure of critical conductive structures that would cause short circuits.
3Ease of manufacture
If sidewall protection layer is excessively lost, then the capping layer removal is complete, but the pillar pattern is exposed to the outside
Solution Approach 1:
The sidewall protection layer is formed with sufficient thickness and protective properties beforehand to cushion against the etching process. This prior cushioning ensures that even during complete capping layer removal, the pillar patterns remain protected and are not exposed to the outside environment or subsequent processing steps.
Data Source
AI summary
In a method of fabricating a semiconductor device on a substrate which includes a plurality of pillar patterns, an impurity region between adjacent pillar patterns, a gate electrode on each pillar pattern, a first capping layer covering the gate electrode, and a separation layer covering the first capping layer between the gate electrodes of adjacent pillar patterns, the first capping layer is removed except for a portion contacting the separation layer, a sacrificial layer is formed to cover the gate electrode, a second capping layer is formed on sidewalls of each pillar pattern, the sacrificial layer is removed and a word line connecting the gate electrodes of the adjacent pillar patterns is formed. In the manufactured device, the first capping layer isolates the impurity region from the word line and the second capping region prevents the sidewalls of the respective pillar pattern from being exposed.