Integrated Assembly Pillar Patterning via Grain Boundary Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory technologies face challenges in developing improved transistors and memory architectures that effectively utilize semiconductor materials to enhance grain boundary generation and patterning for efficient memory cell formation.
Innovation Solution
The method involves creating a template structure with alternating conductive and insulative layers, depositing semiconductor material to generate grain boundaries, and using these boundaries to pattern semiconductor pillars that serve as access devices in memory cells, allowing for improved etching and vertical alignment, thereby enhancing memory performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional memory cell structures are used, then manufacturing processes are simpler, but manufacturing precision and etching results deteriorate
Solution Approach 1:
The patent applies preliminary action by forming an undulating topography template structure before depositing semiconductor material. The template structure includes vertically offset surfaces and transition regions that pre-establish the desired grain boundary patterns. This preliminary structuring enables precise etching and pillar formation without requiring complex post-processing steps, thereby improving manufacturing precision while managing device complexity.
Solution Approach 2:
The patent uses an undulating topography template structure as an intermediary element between the substrate and the final memory cell structure. This template serves as a mediator that guides semiconductor material deposition and self-organizes grain boundaries during the phase change process. The template structure is subsequently removed after transferring its pattern, simplifying the overall manufacturing process while achieving high precision.
2Manufacturing precision
If grain boundary generation is enhanced through template structures, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the physical and chemical parameters of semiconductor material during deposition on the undulating template. The transition regions in the template create controlled variations in deposition parameters, leading to self-organized grain boundary formation. By controlling deposition temperature, rate, and material composition, the patent achieves precise pillar patterning without requiring excessively complex template designs.
Solution Approach 2:
The patent utilizes phase transitions of semiconductor material during the deposition process. As material deposits on the undulating template surfaces, phase changes occur that naturally generate grain boundaries at the transition regions between vertically offset surfaces. This phase transition mechanism automatically patterns the semiconductor into desired configurations, improving pillar patterning precision while avoiding the need for highly complex lithographic patterns.
3Manufacturing precision
If vertical sidewalls are achieved through grain boundary etching, then manufacturing precision improves, but process complexity increases
Solution Approach 1:
The patent applies self-service by designing the undulating template structure to automatically guide the etching process. The transition regions in the template create self-aligned grain boundaries that naturally direct the etch front during semiconductor material removal. This self-guided mechanism produces vertical sidewalls without requiring complex multi-step etching processes or additional alignment steps, thereby improving sidewall verticality while maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in highly integrated and efficient memory architectures with improved etching results, vertical sidewalls, and uniform performance characteristics, enabling better threshold voltage and subthreshold slope characteristics in memory devices.
Implementation Method 1
Grain boundaries are generated by the transition regions during deposition of the semiconductor material
Implementation Method 2
Etching is conducted at least along the grain boundaries to divide the semiconductor material into pillars
Data Source
AI summary
Some embodiments include an integrated assembly which includes a base structure. The base structure includes a series of conductive structures which extend along a first direction. The conductive structures have steps which alternate with recessed regions along the first direction. Pillars of semiconductor material are over the steps. The semiconductor material includes at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Group 16 of the periodic table. The semiconductor material may be semiconductor oxide in some applications. Some embodiments include methods of forming integrated assemblies.