Semiconductor Pillar Patterning via Spacer Filler Masking
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Solution Overview
Problem
Current semiconductor manufacturing techniques, such as double exposure/double patterning and sidewall spacers, are inadequate for creating two-dimensional patterns of regularly spaced pillars due to limitations in photolithography resolution and the inability to produce solid pillars, especially for structures with pitches less than 80 nm.
Innovation Solution
A method involving the formation of sidewall spacers on imageable material features, followed by filling the spaces between them with a flowable polymer filler, and selectively removing the spacers to use the features and filler as masks for etching, allowing for the creation of pillar-shaped nonvolatile memory devices with enhanced resolution and structure density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double exposure/double patterning or sidewall spacer methods are used, then the pitch can be extended beyond photolithography limits, but the methods cannot produce solid pillars or regularly spaced cylindrical annuli for two-dimensional pillar patterns
Solution Approach 1:
The process segments the pattern formation into distinct stages: first forming initial features, then adding sidewall spacers, then filling intermediate spaces with filler material, and finally removing spacers to reveal the complete pillar pattern. This segmentation allows each stage to contribute a specific function that collectively achieves the desired solid pillar structure.
Solution Approach 2:
The filler material acts as an intermediary substance that occupies the spaces between sidewall spacers during the etching process. This intermediary material enables the formation of solid pillars by providing structural support and defining the final pillar geometry, while being selectively removable after the pillars are formed.
2Ease of manufacture
If conventional photolithography tools are used, then the manufacturing process remains simple, but structures with pitch less than 80 nm cannot be created
Solution Approach 1:
The manufacturing process is divided into multiple sequential steps (forming initial features, depositing sidewall spacers, filling with polymer material, selective spacer removal, and etching) that collectively achieve sub-80 nm pitch while using standard photolithography tools. Each step builds upon the previous one to progressively refine the pattern.
Solution Approach 2:
The method transitions from two-dimensional photolithographic patterning to three-dimensional structure formation by adding vertical dimensions through sidewall spacer deposition and filler material insertion. This dimensional transition enables pitch multiplication while maintaining compatibility with existing photolithography equipment.
3Manufacturing precision
If sidewall spacers are used as etch mask, then pitch can be divided by two for one-dimensional patterns, but the method produces cylindrical annuli rather than solid pillars for two-dimensional patterns
Solution Approach 1:
The filler material serves as a mediator that fills the voids between sidewall spacers, transforming the hollow cylindrical annulus structure into solid pillars. This intermediary substance is strategically placed to provide the missing material while maintaining the precise spacing defined by the sidewall spacers.
Solution Approach 2:
The filler material is selectively placed only in the regions between sidewall spacers where pillar formation is desired, while the sidewall spacers themselves are selectively removed. This local differentiation of material presence and removal creates the solid pillar structure with the desired geometry and spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively extends the resolution capability for creating semiconductor pillar structures, enabling the formation of pillar-shaped nonvolatile memory cells with pitches less than 100 nm, thereby improving memory density and reducing manufacturing complexity.
Implementation Method 1
filling a space between a first sidewall spacer on a first feature and a second sidewall spacer on a second feature with a filler feature
Implementation Method 2
the filler feature comprises a flowable polymer material having a viscosity of about 1 to about 15 centipoise (about 1 to about 15 mPa.s)
Implementation Method 3
the step of selectively removing the sidewall spacers comprises selectively etching the sidewall spacers without substantially removing the at least two spaced apart features and the filler feature
Implementation Method 4
forming at least two spaced apart features of imageable material over the at least one layer
Data Source
AI summary
A method of making a semiconductor device includes forming at least one layer over a substrate, forming at least two spaced apart features of imagable material over the at least one layer, forming sidewall spacers on the at least two features and filling a space between a first sidewall spacer on a first feature and a second sidewall spacer on a second feature with a filler feature. The method also includes selectively removing the sidewall spacers to leave the first feature, the filler feature and the second feature spaced apart from each other, and etching the at least one layer using the first feature, the filler feature and the second feature as a mask.