Pillar Phase Change Memory Reset Gate Structure
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Solution Overview
Problem
Phase change memories require high reset currents, leading to large memory cell sizes and significant IR drops due to the use of diodes or bipolar transistors, making it difficult to connect a large number of transistors to a word line and increasing source resistance.
Innovation Solution
A memory device with pillar-shaped phase change layers and a reset gate structure, where the reset gates are connected in rows and columns, acting as heaters to induce phase transitions in the phase change layers, allowing for electrical insulation and reduced current requirements for selection elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high reset current is supplied to achieve phase transition, then phase change memory operation is enabled, but memory cell size increases and source resistance increases
Solution Approach 1:
The invention segments the heating function from the selection function by using a separate reset gate electrode that surrounds the phase change layer. This allows independent control of heating current and selection current, enabling phase transition with optimized current paths that reduce overall cell size and source resistance impact.
Solution Approach 2:
The reset gate insulating film acts as an intermediary between the reset gate electrode and the phase change layer, enabling electrical insulation while allowing thermal coupling. This mediator structure permits the reset gate to heat the phase change layer without direct electrical contact, reducing current requirements and cell size.
2Power
If diode or bipolar transistor is used as selection element, then high reset current can flow, but IR drop increases due to source line resistance
Solution Approach 1:
The reset gate insulating film serves as an intermediary that enables thermal coupling between the reset gate electrode and phase change layer while maintaining electrical insulation. This allows the reset gate to function as an efficient heater with minimal electrical resistance, reducing IR drop in the source line.
Solution Approach 2:
By separating the heating function (reset gate) from the selection function (transistor), the invention creates independent current paths. The reset gate current flows through a low-resistance path surrounded by the insulating film, while selection current flows through the transistor, minimizing IR drop effects.
3Ease of operation
If bipolar transistor is used for selection, then three-terminal control is achieved, but connecting large number of transistors to word line becomes difficult
Solution Approach 1:
The invention segments the transistor gate function from the heating function by introducing a separate reset gate electrode. This allows the transistor to be used solely for selection with simplified connections to the word line, while the reset gate handles heating independently, reducing overall connection complexity.
Solution Approach 2:
The reset gate insulating film acts as an intermediary structure that enables the reset gate electrode to surround and heat the phase change layer without interfering with the transistor's selection function. This mediator structure simplifies the connection architecture between transistors and word lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reset gate structure enables efficient phase transitions in phase change layers with lower current supply, reducing the need for high reset currents and minimizing source resistance, allowing for a more compact and efficient memory device design.
Implementation Method 1
the reset gates are connected in a row direction and in a column direction, and are heaters
Implementation Method 2
Melting at high temperature (high current) and cooling at a high cooling rate (stopping the supply of current) generate an amorphous state (reset operation)
Data Source
AI summary
A method for producing a memory device and semiconductor device includes forming pillar-shaped phase change layers and lower electrodes in two or more rows and two or more columns on a semiconductor substrate. A reset gate insulating film is formed that surrounds the pillar-shaped phase change layers and the lower electrodes, and a reset gate is formed that surrounds the pillar-shaped phase change layers that function as memory devices arranged in two or more rows and two or more columns.