Semiconductor Pillar Planarization After Oxide-Induced Rounding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the semiconductor industry advances, precise control of semiconductor device configurations is challenging due to undesired oxidation, leading to rounding of silicon pillars and uneven surfaces, which result in electrical disconnection and high electric resistance.
Innovation Solution
A method is developed to form a planar surface on silicon pillars by forming a conformal oxide layer, followed by a dielectric layer, and then performing planarization to remove convex surfaces, ensuring a flat top surface for improved contact area and reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conformal oxide layer is formed over the substrate, then the oxide layer provides protection and conformal coverage, but the top corners of the pillars become oxidized and the top surface becomes convex, leading to rounding
Solution Approach 1:
The patent applies preliminary action by performing planarization (CMP or etch-back) immediately after oxide formation to remove the convex surface before subsequent dielectric layer formation. This preliminary correction prevents the rounded shape from propagating through later processing steps and ensures planar surfaces are established before critical subsequent operations.
Solution Approach 2:
The patent converts the harmful oxidation-induced convexity into a beneficial process feature by using the oxide layer as a sacrificial material during planarization. The convex oxide surface is deliberately removed through CMP or etch-back, and the oxide serves as a protective layer during this planarization process, preventing damage to underlying structures while the convexity is corrected.
2Manufacturing precision
If planarization is performed to remove the convex surface, then the top surface becomes planar improving contact area, but material is removed requiring additional dielectric layers to be formed
Solution Approach 1:
The patent merges the planarization function with the dielectric layer formation process by integrating the planarization step into the overall dielectric stacking sequence. Rather than treating planarization as a separate corrective operation, it is combined with the dielectric layer deposition process, where dielectric layers are formed both to replace removed material and to provide the necessary planar surface for subsequent processing.
Solution Approach 2:
The patent applies universality by designing the dielectric layer structure to serve multiple functions: replacing material removed during planarization, providing electrical isolation, establishing planar surfaces for lithography, and accommodating future processing steps. This multi-functional approach consolidates what could be separate operations into a unified dielectric stacking strategy.
3Reliability
If the top surface of pillars is kept planar, then contact area is maximized and resistance is reduced, but oxidation during oxide layer formation causes rounding that reduces contact area
Solution Approach 1:
The patent applies preliminary anti-action by performing planarization immediately after oxide formation to counteract the oxidation-induced convexity before it can affect subsequent processing or final device performance. This preliminary corrective action prevents the rounded shape from becoming permanent and ensures planar surfaces are restored before critical subsequent operations.
Solution Approach 2:
The patent converts the harmful oxidation effect into a beneficial process feature by using the oxide layer as a sacrificial protective material during planarization. The oxidation that causes convexity also creates a removable oxide layer that protects underlying structures during CMP or etch-back, and this oxide is deliberately removed to restore the planar surface, thus converting the harmful oxidation into a useful protective mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method prevents electrical disconnection and high electric resistance, enhancing device performance and yield by maintaining a planar surface on silicon pillars.
Implementation Method 1
the formation of the first oxide layer includes oxidizing top corners of the plurality of pillars, thereby causing the top surface of each of the plurality of pillars to become a convex surface
Implementation Method 2
A planarization is performed on the plurality of pillars to partially or entirely remove the convex surface
Data Source
AI summary
The present application provides a semiconductor structure and a manufacturing method of the semiconductor structure. A substrate is provided, wherein the substrate includes a plurality of pillars, and a top surface of each of the plurality of pillars is a substantially planar surface. A first oxide layer is formed over the substrate conformal to the pillars, wherein the formation of the first oxide layer includes oxidizing top corners of the pillars, thereby causing the top surface of each of the plurality of pillars to become a convex surface. A first dielectric layer is formed among the pillars, wherein the first oxide layer above the plurality of pillars is partially exposed through the first dielectric layer. A planarization is performed on the pillars to partially or entirely remove the convex surface.