Chip Package Pillar Protection Layer for Solder Joint Reliability

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Solution Overview

Problem

The reliability of solder joints in flip-chip mounting methods is compromised due to necking and cracking, particularly at small pitches, caused by thermal stress cycling and differences in thermal expansion, leading to concerns about thermo-mechanical reliability and intermetallic brittleness.

Innovation Solution

A chip package with a pillar protection layer of copper sulfide on the side surfaces of conductive pillars, which prevents solder wicking and maintains solder volume, combined with a solder ball protection layer formed in a sulfur and halogen environment, enhances the robustness and reliability of solder connections by reducing necking and cracking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If flip-chip mounting method is used with small pitch, then mounting area is reduced, but solder joint reliability deteriorates due to necking and cracking

Engineering Contradiction:
Improvemounting areaVSAvoidsolder joint reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A pillar protection layer is formed on the conductive pillar before solder ball attachment to prevent solder wicking during the reflow process. This preliminary protective measure ensures that sufficient solder remains in the joint after reflow, preventing necking and cracking that would otherwise occur in small pitch flip-chip mounting

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pillar protection layer acts as an intermediary barrier between the solder ball and the conductive pillar. It prevents direct contact and solder wicking onto the pillar surface, thereby maintaining solder volume in the joint and improving reliability without requiring larger mounting area

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If solder ball is applied directly on conductive pillar, then manufacturing process is simple, but solder wicking occurs causing necking and cracking

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidsolder joint reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The pillar protection layer is formed on the conductive pillar before the solder ball is applied. This preliminary action prevents solder wicking during subsequent reflow processing, eliminating necking and cracking issues while adding only one process step to the manufacturing sequence

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pillar protection layer, which initially appears to add process complexity, actually converts a harmful effect (solder wicking) into a beneficial outcome (prevented necking and cracking). The layer is later removed after serving its protective function, leaving an improved solder joint

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides robust and reliable electrical and mechanical connections with improved resistance to thermal stress, reducing the likelihood of solder joint failure and intermetallic brittleness, while simplifying the manufacturing process and reducing costs.

Implementation Method 1

exposing the solder ball and the pillar to a sulfur containing environment to form a pillar protection layer of copper sulfide on a side surface of the pillar

Methodology Applied
Scientific EffectChemical reaction (sulfurization): Chemical Bonding

Implementation Method 2

a solder ball protection layer formed in a sulfur and halogen environment

Methodology Applied
Scientific EffectChemical reaction (halogenation): Chemical Bonding

Implementation Method 3

reflowing the solder ball to mechanically and electrically connect the first substrate to the second substrate

Methodology Applied
Scientific EffectMelting: Melting

Data Source

PatentEP3704733B1Chip package assembly with enhanced interconnects and method for fabricating the same
Publication Date: 2022.02.02 XILINX INC
  • EP3704733B1 patent drawingFigure 1
  • EP3704733B1 patent drawingFigure 2
  • EP3704733B1 patent drawingFigure 3A~3B

AI summary

An integrated circuit interconnects 132 are described herein that are suitable for forming integrated circuit chip packages 110. In one example, an integrated circuit interconnect 132 is provided that includes a first substrate 112 containing first circuitry 212, a first contact pad 214, a first pillar 230, a first pillar protection layer 280, a second substrate 114 containing second circuitry 202, and a solder ball 216 disposed on the first pillar 230 and electrically and mechanically coupling the first substrate 112 to the second substrate 114. The first contact pad 214 is disposed on the first substrate 112 and coupled to the first circuitry 212. The first pillar 230 electrically disposed over the first contact pad 214. The first pillar protection layer 280 is hydrophobic to solder and is disposed on a side surface 262 of the first pillar 230.