Pillar-Shaped Semiconductor Layer Formation via Gate-First Process
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is forming a pillar-shaped semiconductor layer after the gate electrode is formed, while ensuring reduced leakage current and maintaining circuit area efficiency, as existing methods struggle with the stability of narrow pillar-shaped semiconductor layers.
Innovation Solution
A method involving the deposition of insulating films, formation of holes, filling with metal to create a gate electrode, and epitaxial growth of a semiconductor layer within these holes to form a pillar-shaped semiconductor layer, with additional insulating films to prevent metal contamination and ensure insulation between the gate electrode and the semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pillar-shaped semiconductor layer is formed before the gate electrode, then the gate can surround the semiconductor layer, but the pillar-shaped semiconductor layer cannot be formed upright when narrow
Solution Approach 1:
The patent inverts the conventional process sequence by forming the gate electrode first and then forming the pillar-shaped semiconductor layer afterward. This reversal allows the pillar to be formed upright with proper support structures in place, solving the stability issue that occurs when trying to form narrow pillars before gate formation.
Solution Approach 2:
The gate electrode and its surrounding structures (insulating films, side walls) are formed in advance before the pillar-shaped semiconductor layer is created. This preliminary action provides a stable framework that supports the subsequent formation of the narrow pillar, ensuring it can be formed upright without collapsing.
2Reliability
If the gate electrode is formed first, then the pillar-shaped semiconductor layer can be formed afterward, but metal contamination may occur in the semiconductor layer
Solution Approach 1:
The patent introduces an insulating film as an intermediary layer between the metal gate electrode and the semiconductor layer. This intermediate insulating barrier prevents direct contact and potential metal contamination while maintaining the necessary electrical insulation and structural integrity.
Solution Approach 2:
The harmful metal gate electrode is extracted or separated from direct contact with the semiconductor layer by removing the problematic interaction and replacing it with an insulating film interface, thereby eliminating the contamination risk while preserving the functional relationship.
3Area of stationary object
If the pillar-shaped semiconductor layer is made narrow to reduce circuit area, then circuit area is reduced, but leakage current increases
Solution Approach 1:
The patent changes the geometric parameters of the pillar-shaped semiconductor layer, specifically making it narrower, to reduce the circuit area. This parameter change achieves area reduction while the surrounding gate structure compensates for the increased leakage current through improved electric field control.
Solution Approach 2:
The patent transitions from a planar transistor structure to a three-dimensional pillar-shaped structure with the gate surrounding the pillar. This dimensional change allows for better control of the semiconductor layer and reduced leakage current despite the narrower cross-section, as the gate can more effectively control the current flow from all sides.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the successful formation of a semiconductor device with a pillar-shaped semiconductor layer after the gate electrode is formed, reducing metal contamination and maintaining insulation, thereby addressing the challenges of leakage current and circuit area reduction.
Implementation Method 1
forming a gate insulating film on a side surface of the second hole
Implementation Method 2
epitaxially growing a semiconductor layer, within the second hole, on the planar semiconductor layer to form a first pillar-shaped semiconductor layer
Data Source
AI summary
A method for producing a semiconductor device includes depositing a first insulating film and a second insulating film on a planar semiconductor layer formed on a substrate; forming a first hole for forming a gate electrode in the second insulating film; filling the first hole with a first metal to form the gate electrode; forming a side wall formed of a third insulating film on an upper surface of the gate electrode and a side surface of the first hole; performing etching through, as a mask, the side wall formed of the third insulating film, to form a second hole in the gate electrode and the first insulating film; forming a gate insulating film on a side surface of the second hole; and epitaxially growing a semiconductor layer, within the second hole, on the planar semiconductor layer to form a first pillar-shaped semiconductor layer.