Pillar-Shaped Semiconductor Device Impurity Interdiffusion Barrier
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Solution Overview
Problem
The challenge in increasing the degree of integration of semiconductor devices using surrounding gate transistors (SGTs) is the decrease in driving capability and malfunction due to interdiffusion of donor and acceptor impurities as the separation distance between SGTs decreases, leading to high-resistance source and drain formation and incorrect conductivity type formation.
Innovation Solution
A method for producing pillar-shaped semiconductor devices involves forming semiconductor layers with lower impurity concentrations and specific diffusion coefficients to prevent interdiffusion, ensuring that high-concentration impurity layers do not contact each other, thereby maintaining the integrity of the impurity regions and preventing interdiffusion-induced malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the separation distance between SGTs is decreased to increase integration density, then the degree of integration is improved, but interdiffusion of donor and acceptor impurities occurs causing decrease in driving capability and malfunction
Solution Approach 1:
The patent introduces a semiconductor layer that segments and isolates the high-concentration donor and acceptor impurity layers, preventing their interdiffusion while allowing the pillars to be closely spaced for high integration density
Solution Approach 2:
The semiconductor layer acts as an intermediary barrier between the donor and acceptor impurity layers, blocking the interdiffusion path and preventing the harmful interaction between oppositely doped regions
2Productivity
If the separation distance between SGTs is decreased to increase integration density, then the degree of integration is improved, but high-resistance source and drain formation occurs
Solution Approach 1:
The semiconductor layer segments the impurity regions to prevent mixing, ensuring that each source and drain region maintains its high-concentration doping profile and low resistance characteristics
Solution Approach 2:
The patent applies different doping concentrations locally - high concentration in the source/drain regions for low resistance, and lower concentration in the channel region for proper transistor operation
3Productivity
If the separation distance between SGTs is decreased to increase integration density, then the degree of integration is improved, but formation of source and drain of opposite conductivity type occurs causing malfunction
Solution Approach 1:
The semiconductor layer serves as a protective intermediary that prevents oppositely doped impurity layers from contacting and exchanging impurities, ensuring each region maintains its intended conductivity type
Solution Approach 2:
The semiconductor layer is formed beforehand to establish a barrier that prevents future interdiffusion issues, ensuring the integrity of conductivity types before the pillars are fully assembled
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the decrease in driving capability and malfunction caused by interdiffusion, allowing for the formation of high-density SRAM cells and microprocessor circuits with improved performance.
Implementation Method 1
a first semiconductor layer having a smaller thickness than the first impurity layer... so that the first impurity region and the second impurity region are not in contact with each other
Data Source
AI summary
A method for forming a first impurity region 3 connected to lower portions of first semiconductor pillars and second impurity regions 4a and 4b connected to lower portions of second semiconductor pillars includes forming a semiconductor layer 100 having an impurity concentration lower than an impurity concentration of each of the first impurity region 3 and the second impurity regions 4a and 4b in impurity boundary regions of the first impurity region 3 and the second impurity regions 4a and 4b in a vertical direction and a horizontal direction.