3D Pillar Semiconductor Device for Phase-Change Memory Current Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing the cross-sectional area of variable-resistance films and lower electrodes to allow large current passage while incorporating a variable-resistance memory element, particularly in phase-change memories where high reset currents require significant cell sizes and complex transistor structures.
Innovation Solution
A semiconductor device structure featuring pillar-shaped semiconductor layers with metal gate electrodes and nitride insulator layers, along with specific metal contacts and diffusion layers, is developed to reduce the cross-sectional area of variable-resistance films and lower electrodes, enabling efficient current passage and integration of phase-change memory elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the cross-sectional area of variable-resistance films and lower electrodes is reduced, then current passage capability is improved, but the area available for phase-change material and thermal management is reduced
Solution Approach 1:
The patent transitions from planar 2D cross-sectional geometry to 3D pillar-shaped structures with gate electrodes wrapping around the semiconductor pillar. This dimensional change allows the gate to contact the channel from multiple directions (top and sidewalls), effectively increasing the gate width per unit area and improving current control without increasing the planar footprint.
Solution Approach 2:
The gate electrode is positioned to surround the semiconductor pillar, with the gate insulating film nested between them. The variable-resistance film is formed around the pillar structure, creating a nested configuration where multiple functional layers are concentrically arranged around a central semiconductor pillar, maximizing space utilization.
2Reliability
If pillar-shaped semiconductor layers with surrounding gate electrodes are used, then current control is improved, but device structure complexity increases
Solution Approach 1:
The gate insulating film is segmented into different regions: a first gate insulating film surrounding the lower portion of the semiconductor pillar, and a second gate insulating film surrounding the upper portion. This segmentation allows different materials and formation processes to be used in different regions, optimizing both electrical performance and manufacturability.
Solution Approach 2:
The patent employs composite material structures including metal gate electrodes, nitride insulator layers, and phase-change materials (GST: Ge2Sb2Te5) combined with chalcogenide glass. These composite materials provide tailored electrical, thermal, and structural properties that cannot be achieved with single materials.
3Reliability
If metal gate electrodes and nitride insulator layers are incorporated, then device performance is improved, but manufacturing process complexity increases
Solution Approach 1:
The gate insulating films are formed surrounding the semiconductor pillars before the gate electrodes are deposited. This preliminary formation of the insulating structure establishes the thermal and electrical isolation framework early in the process, enabling subsequent high-temperature metal gate deposition and phase-change material formation without compromising the insulating structure.
Solution Approach 2:
The patent utilizes phase-change materials that can transition between crystalline and amorphous states through temperature control. By changing the thermal parameters (heating rate, peak temperature, cooling rate), the resistance state of the variable-resistance film is controlled, enabling non-volatile memory storage without additional material layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a substantial reduction in the cross-sectional area of variable-resistance films and lower electrodes, facilitating larger current flow and improved cooling of phase-change films, thereby enhancing the performance and efficiency of phase-change memory devices.
Implementation Method 1
turning on a cell transistor causes a current to pass between a bit line and a source line; this causes a high-resistance-element heater to generate heat; this melts chalcogenide glass (GST: Ge2Sb2Te5) in contact with the heater
Implementation Method 2
chalcogenide glass that is melted at a high temperature (with a large current) and rapidly cooled (by stopping the current) is brought to an amorphous state (Reset operation)
Data Source
AI summary
A semiconductor device includes first pillar-shaped semiconductor layers, a first gate insulating film formed around the first pillar-shaped semiconductor layers, gate electrodes formed around the first gate insulating film, gate lines connected to the gate electrodes, a second gate insulating film formed around upper portions of the first pillar-shaped semiconductor layers, first contacts formed of a first metal material and formed around the second gate insulating film, second contacts formed of a second metal material and connecting upper portions of the first contacts and upper portions of the first pillar-shaped semiconductor layers, diffusion layers formed in lower portions of the first pillar-shaped semiconductor layers, pillar-shaped insulator layers formed on the second contacts, variable-resistance films formed around upper portions of the pillar-shaped insulator layers, and lower electrodes formed around lower portions of the pillar-shaped insulator layers and connected to the variable-resistance films.