Pillar Semiconductor Storage Structure With Low-Resistance Wraparound Contact
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Solution Overview
Problem
The existing methods for manufacturing semiconductor storage devices require forming through via holes with large aspect ratios, which increases manufacturing costs and can lead to contact resistance issues between semiconductor layers and conductive layers.
Innovation Solution
The semiconductor storage device design involves removing the semiconductor substrate to expose the upper end of the semiconductor layer and forming conductive layers on both the inner and outer peripheral surfaces of the semiconductor layer, eliminating the need for high-aspect-ratio via holes and increasing the contact area to reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through via holes with large aspect ratios are formed to connect semiconductor layers and conductive layers, then electrical connection is achieved, but manufacturing cost increases and contact resistance problems occur
Solution Approach 1:
The patent transitions from vertical through-via connections (one-dimensional path) to a three-dimensional structure where conductive layers wrap around the semiconductor layer, providing multiple contact paths through inner peripheral surfaces, outer peripheral surfaces, and end surfaces, thereby reducing contact resistance without requiring high-aspect-ratio vias
Solution Approach 2:
The conductive connection is segmented into multiple separate conductive layers that contact different surfaces of the semiconductor layer (inner peripheral surface, outer peripheral surface, and end surface), distributing the electrical connection across multiple contact points to reduce overall contact resistance
2Reliability
If through via holes with large aspect ratios are formed, then electrical connection is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent replaces complex vertical through-via formation (requiring precise high-aspect-ratio drilling and filling) with a layered conductive structure that wraps around the semiconductor layer, simplifying the manufacturing process by using standard thin-film deposition and patterning techniques
3Reliability
If the semiconductor substrate is removed to expose the upper end of the semiconductor layer, then contact area is increased, but additional manufacturing steps are required
Solution Approach 1:
The semiconductor substrate is removed in advance during the manufacturing process to expose the upper end of the semiconductor layer before forming the conductive layers, enabling the conductive layers to contact multiple surfaces (inner peripheral, outer peripheral, and end surface) and maximize contact area for reduced contact resistance
Data Source
AI summary
A semiconductor storage device includes a substrate, a plurality of first conductive layers arranged in a first direction intersecting with a surface of the substrate, a first semiconductor layer that extends in the first direction and faces the plurality of first conductive layers, a first gate insulating film that extends in the first direction and covers an outer peripheral surface of the first semiconductor layer, a first insulating layer that extends in the first direction and has an outer peripheral surface covered with the first semiconductor layer, and a second conductive layer that is farther from the substrate than the plurality of first conductive layers and is connected to one end in the first direction of the first semiconductor layer. The first semiconductor layer includes a first region facing the plurality of first conductive layers and a second region farther from the substrate than the first region. The second conductive layer is connected to an inner peripheral surface and an outer peripheral surface of the second region of the first semiconductor layer and is in contact with one end in the first direction of the first insulating layer.