Semiconductor Pillar Support Patterns for High Integration
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Solution Overview
Problem
The integration of semiconductor devices is hindered by the difficulty in exposing side surfaces of bottom electrodes due to small gaps and the need for new exposure techniques, which require expensive and complex processes.
Innovation Solution
A semiconductor device design featuring a support pattern with multiple support holes of varying shapes on the semiconductor substrate, which connect pillars and expose side surfaces of bottom electrodes, allowing for uniform dielectric and top electrode layer deposition without extending into peripheral circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If line widths of patterns are reduced for high integration, then integration density is improved, but new expensive exposure techniques are required
Solution Approach 1:
The patent segments the support structure into multiple support holes instead of using a continuous support layer. This segmentation allows for selective exposure and formation of support regions, enabling the use of conventional exposure techniques while achieving high integration density through precise local support formation.
Solution Approach 2:
The support holes are strategically positioned to provide local support only where needed - specifically exposing side surfaces of bottom electrodes in active regions while avoiding peripheral circuit areas. This local quality approach allows uniform dielectric layer deposition in critical areas without requiring expensive new exposure techniques for the entire substrate.
2Difficulty of detecting and measuring
If support pattern extends into peripheral circuits to expose side surfaces, then side surface exposure is improved, but peripheral circuit area is reduced
Solution Approach 1:
The support holes are designed with specific shapes and positions that provide local quality - they expose side surfaces of bottom electrodes in the active cell region while their boundaries are carefully controlled to stop before encroaching on peripheral circuit areas. This allows side surface exposure where needed without sacrificing peripheral circuit space.
Solution Approach 2:
Instead of extending the support pattern horizontally into peripheral areas, the invention uses vertical dimensionality - creating support holes that penetrate through dielectric layers to expose side surfaces at different depths. This dimensional approach exposes side surfaces without horizontal width extension into peripheral circuits.
3Ease of manufacture
If support pattern is designed with uniform width, then manufacturing is simplified, but uniform layer deposition in densely packed structures is difficult
Solution Approach 1:
The support pattern is segmented into multiple discrete support holes rather than a continuous uniform structure. Each support hole can be independently formed with precise control over its shape and position, allowing the exposed side surfaces to be optimally positioned for uniform dielectric and top electrode layer deposition while maintaining relatively simple fabrication processes.
Data Source
AI summary
A semiconductor device comprises a plurality of pillars on a semiconductor substrate, and a support pattern in contact with at least one side surface of each of the pillars. The support pattern connects the pillars with one another. The support pattern includes a plurality of support holes that expose side surfaces of the pillars. The support holes includes a first support hole and a second support hole that are spaced apart from each other. The pillars have circular cross-sections. A ribbon-like hexagon is obtained in a plan view when connecting an inner sidewall of the first support hole with central points of the cross-sections of the pillars exposed through the first support hole.