Pillared Cavity MIS-SiP Substrate Design
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Solution Overview
Problem
Current System in Package (SiP) technologies, such as SiP-ETS, face challenges including thin substrate handling issues, complex manufacturing processes, high costs due to metal carrier requirements, limited passive component stand-off height, and slow through mold via (TMV) processes, which hinder efficient and cost-effective production.
Innovation Solution
The introduction of a Mold Interconnect Substrate (MIS) with copper pillars and a pillared cavity structure replaces traditional substrates, eliminating the need for carriers and TMV connections, and incorporates a molding compound for improved thickness and thermal conductivity, allowing for more robust and efficient assembly processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If a thin substrate (85 μm) is used to achieve miniaturization, then package thickness is reduced, but substrate handling becomes difficult and requires metal carriers and stiffeners
Solution Approach 1:
The patent combines the substrate support function with the substrate itself by integrating stiffening structures directly into the substrate layers, eliminating the need for separate metal carriers. The interdigitated electrode structures and layered construction provide inherent mechanical support to the thin substrate during handling and assembly.
2Reliability
If Through Mold Via (TMV) process is used to achieve connections, then electrical interconnect is enabled, but manufacturing complexity and cost increase due to laser drilling every individual hole
Solution Approach 1:
The patent extracts the connection function from the TMV process by using exposed copper pillars that extend through the molding compound to the substrate surface. This eliminates the need for laser drilling and filling individual via holes, replacing it with a simpler process of forming copper pillars during the molding stage.
Solution Approach 2:
The copper pillars serve multiple functions: they provide electrical connection, mechanical support, and thermal conduction pathways. This multi-functionality replaces the specialized TMV process while achieving the same electrical interconnect reliability.
3Force
If Electroless nickel immersion gold (ENIG) layer is applied to achieve proper solder paste thickness, then Stand off height (SOH) is increased, but material cost increases and non-planar surface effect occurs
Solution Approach 1:
The patent replaces expensive ENIG plating with a simpler copper-based solution. The copper pillars are formed through standard plating processes and provide adequate solderability without requiring the additional nickel and gold layers, significantly reducing material costs while maintaining functional performance.
Data Source
AI summary
A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.