Reserved Memory Cells for Defect Mapping in Non-Volatile Storage
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Solution Overview
Problem
Non-volatile memory systems face inefficiencies in identifying and correcting defective data storage cells, which can lead to distorted information and reduced storage reliability due to limitations in existing error correction codes and defect management schemes.
Innovation Solution
The use of reserved 'pilot' cells to identify and mark defective data storage cells, allowing for improved error correction by differentiating between fewer voltage levels and storing information about defective cell locations, thereby enhancing error correction capabilities without requiring additional circuitry or resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction codes and defect management schemes are used, then defective cells can be corrected to some extent, but error correction efficiency is limited and storage reliability is reduced
Solution Approach 1:
The patent applies preliminary action by pre-identifying and marking defective cells during a test phase before actual data storage operations. The memory controller performs write operations to all cells, reads back the data, compares expected vs. actual values, and stores defect information in dedicated defect storage locations. This advance preparation enables the system to quickly recognize and handle defective cells during normal operations, significantly improving error correction efficiency without compromising storage reliability.
2Reliability
If additional circuitry or resources are allocated to improve error correction capabilities, then error correction power increases, but device complexity and overhead increase
Solution Approach 1:
The patent implements universality by making the memory controller perform multiple functions: it acts as both the control unit for normal memory operations and the defect detection/identification system. The same read/write circuitry is reused for both data operations and defect testing. Additionally, defect information is stored in existing memory locations rather than requiring separate dedicated storage circuitry, thereby enhancing error correction capability without proportionally increasing device complexity.
Solution Approach 2:
The memory system performs self-diagnosis and self-characterization by automatically detecting its own defective cells during initialization or test phases. The system uses its own read/write capabilities to identify defects and stores the defect map within its own memory structure. This self-service approach eliminates the need for external testing equipment or additional dedicated characterization circuitry, improving error correction capability while minimizing overhead.
3Measurement precision
If more reserved cells are used to identify defective cell positions, then error correction precision improves, but memory capacity and productivity decrease
Solution Approach 1:
The patent applies segmentation by dividing the memory space into functional segments: data storage locations and defect storage locations. The defect information is stored in dedicated but minimal locations that are separate from the main data storage area. This segmentation allows the system to maintain high precision in defective cell identification while preserving the majority of memory capacity for actual data storage, as only a small overhead is required to store the defect map.
Data Source
AI summary
A system including a first plurality of memory cells to store data, and a memory controller to read the first plurality of memory cells and to identify one or more of the first plurality of memory cells in response to the one or more of the first plurality of memory cells being defective. A second plurality of memory cells stores information regarding locations of the one or more of the first plurality of memory cells. The second plurality of memory cells stores the information at a lower density than the first plurality of memory cells. The information read from the second plurality of memory cells has a lower probability of error than the data read from the first plurality of memory cells.