Pilot Signal Pre-computation for Single Carrier Transmission
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Solution Overview
Problem
Current single carrier transmission systems face challenges in reducing the cross-correlation of pilot signals and the computational complexity of DFT and IDFT processes, particularly when using prime number or large prime number sequence lengths for pilot signals in wireless access processes beyond 3G.
Innovation Solution
The system independently sets data and pilot block sizes, employing Zadoff-Chu sequences with prime number or large prime number lengths for low cross-correlation, and pre-calculates or stores pilot sequences in the frequency domain to eliminate DFT and IDFT computations for pilot signals, allowing amplitude estimation in the frequency domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If prime number or large prime number sequence lengths are used for pilot signals, then cross-correlation of pilot signals is reduced, but computational complexity of DFT and IDFT processes increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing pilot sequences in the frequency domain before transmission. The base station pre-generates frequency-domain pilot sequences and stores them, eliminating the need for real-time DFT computation during transmission. This resolves the contradiction by maintaining low cross-correlation properties of prime-length sequences while avoiding the computational complexity burden.
Solution Approach 2:
The patent extracts and removes the DFT and IDFT computational processes from the pilot signal processing chain. By working directly in the frequency domain and eliminating transformation steps, the system retains the benefits of prime-length sequences for cross-correlation reduction while removing the computational burden of Fourier transformations.
2Reliability
If DFT and IDFT computations are performed for pilot signals, then signal processing is complete, but processing time and computational load increase
Solution Approach 1:
The base station performs preliminary action by pre-calculating frequency-domain pilot sequences and storing them ready for transmission. This eliminates the need for real-time DFT computation during the transmission phase, significantly reducing processing time while ensuring complete signal processing through pre-computed accurate sequences.
Solution Approach 2:
The patent applies skipping by bypassing the DFT and IDFT computational steps entirely for pilot signals. By working directly in the frequency domain and eliminating transformation steps, the system rushes through the processing requirement by using pre-computed sequences, achieving complete processing without the time-consuming transformation operations.
3Adaptability or versatility
If independent data and pilot block sizes are used, then flexibility in sequence length selection is improved, but system complexity increases
Solution Approach 1:
The patent applies segmentation by independently configuring data block size (Ntx_d) and pilot block size (Ntx_p) as separate parameters. This allows flexible selection of prime numbers for pilot sequences to optimize cross-correlation properties while maintaining standard block sizes for data processing, dividing the configuration into independent manageable segments that can be optimized separately.
Solution Approach 2:
The patent applies parameter changes by allowing independent adjustment of block size parameters Ntx_d and Ntx_p. The system can change the pilot block size to use prime numbers for optimal cross-correlation while keeping data block size at standard values, and change the processing mode from time-domain with DFT to frequency-domain direct processing, resolving the complexity issue through parameter flexibility.
Data Source
AI summary
A memory 21 of a pilot processing circuit 2 holds in advance a pilot sequence converted into a frequency region signal obtained by subjecting a pilot signal symbol transmitted in one block to Ntx_p-point DFT. The pilot sequence held in the memory 21 is subjected to a series of processes including a roll-off filtering by a roll-off filter circuit 22, subcarrier mapping process by subcarrier mapping circuit 23, an Ndft_p-point IDFT operation by an IDFT circuit 24, and a cyclic prefix adding process by a cyclic prefix adding circuit 25.