PIM MAC Address Stride Update for Faster Convolution Access

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Solution Overview

Problem

Existing memory systems face inefficiencies in determining addresses for different portions of data matrices during convolution operations when striding is used, leading to delays in performing convolution operations as addresses are provided by a host, which can slow down processing.

Innovation Solution

The implementation of additional registers in the memory system to store stride values, counter values, and threshold values, along with first and second adder circuitry, enables the MAC engine to locally update addresses for vertical and horizontal striding, allowing for efficient convolution operations without relying on host-provided addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If addresses are provided by a host during convolution operations, then the memory system can perform convolution operations, but the processing speed is slowed down due to address determination delays

Engineering Contradiction:

Improveprocessing speedVSAvoidaddress determination delay

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The memory system performs address determination autonomously using internal components (adder circuitry, registers for stride/counter/threshold values) without requiring host intervention. The MAC engine locally updates addresses for vertical and horizontal striding, enabling the system to serve itself and eliminate waiting time for host-provided addresses.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The memory system pre-loads stride values, counter values, and threshold values into registers before convolution operations begin. This preliminary preparation of address update parameters enables rapid local address determination during operation, eliminating the need for real-time host address provision.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If additional registers and adder circuitry are added for local address updates, then convolution operations can proceed without host address provision, but the device complexity increases

Engineering Contradiction:

Improveconvolution operation throughputVSAvoidmemory system structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The additional registers and adder circuitry serve multiple functions: storing stride values for vertical striding, counter values for horizontal striding, threshold values for operation control, and performing address arithmetic. This multi-functionality justifies the added components by enabling autonomous address determination that eliminates host dependency and improves throughput.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250383873A1Address updating using stride for processing-in-memory

Publication Date: 2025.12.18 MICRON TECHNOLOGY INC

AI summary

An address can be updated to perform convolution operations. Updating an address can include determining, at a MAC engine coupled to an array of memory cells, a first address of first data and accessing the first data using the first address from the array. Updating the address can also include performing, at the MAC engine, a first convolution operation using the first data. Updating the address can further include determining, at the MAC engine, a second address of second data using a stride corresponding to the convolution operation and accessing the second data using the second address from the array. Updating the address can also include performing, at the MAC engine, the second convolution operation using the second data.