Coherent Secondary Unit PIM Address Table Reduces Probe Filter Accesses
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of processing-in-memory (PIM) devices in computer systems complicates the maintenance of cache coherency protocols, leading to excessive probe filter accesses when a single PIM request touches data from multiple cache lines.
Innovation Solution
A coherent secondary unit is introduced to manage PIM requests, utilizing a PIM address table (PAT) to track recent PIM requests. This allows subsequent requests to the same address to skip probe filter accesses, reducing unnecessary probe traffic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PIM capabilities are added to memory devices to improve performance and energy efficiency, then processing capability and energy efficiency are improved, but the complexity of maintaining cache coherency protocol increases
Solution Approach 1:
A coherent secondary unit is introduced as an intermediary component between PIM devices and the cache coherency protocol. This unit includes a PIM address table that tracks which PIM requests have already been processed, filtering out redundant coherency probes before they reach the cache subsystem. The intermediary absorbs the complexity of tracking PIM request states, preventing this complexity from propagating through the entire cache coherency system.
2Reliability
If probe filters are used to track cache status of data for memory ranges, then cache coherency is maintained, but the number of probe filter accesses increases significantly for PIM requests
Solution Approach 1:
The coherent secondary unit performs preliminary filtering of PIM requests before they reach the probe filter. By checking the PIM address table in advance and identifying requests that have already been processed, the system performs the filtering action beforehand, preventing redundant probe filter accesses. This preliminary action maintains cache coherency reliability while dramatically improving probe filter access efficiency.
3Productivity
If a single PIM request touches data from many cache lines, then processing efficiency is improved, but the number of coherency probes triggered increases
Solution Approach 1:
The PIM address table provides feedback information about previously processed PIM requests. When a new PIM request arrives, the coherent secondary unit checks the address table to see if the same memory address has already been accessed. This feedback mechanism allows the system to recognize redundant requests and suppress unnecessary coherency probes, maintaining high PIM processing efficiency while reducing the quantity of coherency probes generated.
Data Source
AI summary
Systems, apparatuses, and methods for reducing probe filter accesses in response to processing-in-memory (PIM) requests are disclosed. A coherent secondary unit receives PIM requests targeting a corresponding PIM device. For each PIM request that is received, the coherent secondary unit performs a lookup of a PIM address table (PAT). If the address of the PIM request matches an address of an existing entry in the PAT, the coherent secondary unit prevents the PIM request from being sent to a probe filter. Otherwise, if there is no match for the address of the PIM request in the entries of the PAT, the coherent secondary unit sends the PIM request to the probe filter, and the coherent secondary unit creates a new PAT entry for the address of the PIM request. Any subsequent PIM requests to the same address will match with the new entry in the PAT.