PIM Calculation Circuit With Lightweight Normalization for Mixed Data Types
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Solution Overview
Problem
Existing processing-in-memory (PIM) devices face challenges in performing computations on various data types efficiently within a short period, particularly due to inefficient data distribution and accumulation operations, which are further exacerbated in memory systems.
Innovation Solution
A calculation circuit and memory device with an input allocator, adder tree, accumulator, and lightweight normalizer are employed to divide and process input data based on its type, performing multiplication and accumulation operations efficiently, including bit shifting and normalization to optimize computation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional PIM devices perform computations on various data types, then computational versatility is improved, but computation time increases and efficiency deteriorates
Solution Approach 1:
The input data is divided into multiple operation elements (e.g., first through fourth operation elements) that are processed in parallel through separate multiplication paths. This segmentation allows various data types to be handled simultaneously without sequential processing delays, maintaining both versatility and efficiency.
Solution Approach 2:
The patent introduces a dimensional transformation by converting diverse data types into a unified operational framework through exponent manipulation and bit shifting. By operating in the exponent dimension rather than directly on varied data formats, the system achieves type-agnostic processing that maintains speed while handling multiple data types.
2Productivity
If traditional PIM devices perform multiplication and accumulation operations, then computational capability is improved, but computational load increases and processing time extends
Solution Approach 1:
The system performs preliminary actions by pre-calculating and storing exponent values in accumulation registers before the main computation sequence. This preliminary exponent preparation allows the multiplication and accumulation operations to proceed without real-time exponent manipulation overhead, significantly reducing processing time while maintaining full computational capability.
Solution Approach 2:
The patent replaces traditional mechanical multiplication circuits with an adder-based multiplication system that uses repeated addition and bit shifting. This substitution leverages the speed of addition operations and parallel processing capabilities, achieving multiplication results faster than conventional approaches while reducing circuit complexity.
3Measurement precision
If PIM devices perform normalization operations on computation results, then accuracy is improved, but additional computational steps increase processing time
Solution Approach 1:
The normalization process is extracted and separated into distinct bit shifting operations that manipulate only the exponent portions of the results. By extracting the exponent components and handling them separately through simple bit shifts rather than full normalization routines, the system achieves accurate results without the time penalty of traditional normalization methods.
Data Source
AI summary
A calculation circuit, a memory device including the calculation circuit, and a calculation method are provided. The calculation circuit comprises an input allocator receiving and dividing n-bit input data (where n is a natural number equal to or greater than 2) into a plurality of operation elements based on a data type of the input data, an adder tree performing a multiplication operation between the operation elements, and an accumulator generating a first output value by adding an output value of the adder tree to a value stored in an accumulation register, wherein the first output value includes a sign bit and data bits, and the accumulator includes a first lightweight normalizer that performs bit shifting on the first output value by comparing a value of the sign bit with values of m bits (where m is a natural number) among the data bits.