PIM Command Throughput via Data Bus Address Routing
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Solution Overview
Problem
In Processing In Memory (PIM) systems, command bus congestion occurs due to sparse or irregular memory accesses, which limits performance in workloads like machine learning and large-scale graph analytics, as existing solutions like increasing command wires are costly and inefficient for conventional workloads.
Innovation Solution
Implementing special PIM commands where address information is transmitted via a data bus instead of the command bus, allowing different commands or address information to be provided to each memory module, reducing command bus traffic and improving bus utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate PIM commands with different address information are sent to each memory module for sparse or irregular memory accesses, then each memory module can access different rows and columns, but command bus congestion occurs and performance is limited
Solution Approach 1:
The patent merges multiple separate PIM commands into a single unified command structure. Instead of sending individual commands to each memory module with different address information, the system uses a single command with a bitmask to select which memory modules should execute the operation, and transmits address information separately through the data bus. This combining approach reduces command bus traffic while maintaining the ability to target specific memory modules for sparse or irregular accesses.
Solution Approach 2:
The patent introduces an intermediary mechanism where address information is transmitted through the data bus rather than being embedded in command bus signals. The data bus acts as an intermediary channel that carries address information separately from the command signals, allowing the command bus to focus on control signals while the data bus handles address information. This separation reduces command bus congestion and enables more efficient command transmission.
2Productivity
If the number of channels or command wires per channel is increased to reduce command bus congestion, then command bus throughput improves, but the solution is expensive and wasteful for conventional workloads
Solution Approach 1:
The patent makes the data bus serve a dual function: it continues to carry data for conventional workloads while also serving as the transmission medium for address information in PIM commands. By making the data bus universal and multi-functional, the system avoids the need to add separate dedicated channels or wires for address transmission. This approach improves command bus throughput for PIM operations without increasing device complexity or adding costly additional hardware components.
3Ease of manufacture
If conventional memory interfaces are used without modifications, then ease of manufacture is maintained, but command bus congestion limits performance for sparse or irregular memory accesses
Solution Approach 1:
The patent changes the parameter of how address information is transmitted by modifying the command structure to include a bitmask for selecting memory modules and using the data bus for address information transmission. This parameter change allows the system to maintain compatibility with conventional memory interfaces while enabling efficient handling of sparse or irregular memory accesses. The modifications are minimal and focus on changing the command transmission parameters rather than fundamentally redesigning the interface.
Data Source
AI summary
An approach is provided for reducing command bus traffic between memory controllers and PIM-enabled memory modules using special PIM commands. The term “special PIM command” is used herein to describe embodiments and refers to a PIM command for which the corresponding module-specific command information is provided to memory modules via a non-command bus data path. A memory controller generates and issues a special PIM command to multiple PIM-enabled memory modules via a command bus and provides module-specific command information (e.g., address information) for the special PIM command to the PIM-enabled memory modules via the non-command bus data path that is shared by the PIM-enabled memory modules and the memory controller.