Processor-in-Memory Logic Units for In-Device Computation

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Solution Overview

Problem

Von-Neumann computer architecture systems face performance limitations due to high energy consumption and complexity from focusing on CPU improvements, leading to inefficient data movement and processing inefficiencies.

Innovation Solution

The integration of a processor-in-memory (PIM) system, where memory devices include both processor memory cells for computations and legacy memory cells for storage, allowing for in-device processing and direct access, reducing the need for data movement and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is moved from memory to CPU for processing in Von-Neumann architecture, then computations can be performed on data, but energy consumption increases and processing time is extended due to repeated data movement

Engineering Contradiction:
Improvecomputation speedVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent combines memory storage and processing functions into a single integrated device. Memory cells store data while embedded logic units perform computations directly on the stored data, eliminating the need for separate CPU processing and repeated data movement between memory and processor, thus reducing energy consumption while maintaining computation speed

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If processor features like pipelining, caching, and multi-cores are added to hide data movement latencies, then processing throughput is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improveprocessing throughputVSAvoidarchitecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the memory device into multiple independent memory cell blocks, each with its own embedded logic unit. This segmentation allows parallel processing of different data sets across multiple blocks, achieving high processing throughput without requiring complex system-level features like caching or multi-core processors, thus maintaining simplicity at the device level

Inventive Principle:
Principle #1Segmentation

3Power

If more logic gates are added to processor to improve computational capabilities, then processing power increases, but leakage and power consumption increase

Engineering Contradiction:
Improveprocessing powerVSAvoidpower leakage
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent enables memory cells to perform computations on their own stored data using embedded logic units, eliminating the need for external CPU processing. This self-service approach allows computations to be performed directly where data is stored, reducing the need for additional logic gates in separate processors and minimizing power leakage while maintaining processing power

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11886737B2Devices and systems for in-memory processing determined
Publication Date: 2024.01.30 INFINEON TECHNOLOGIES AG
  • US11886737B2 patent drawing
  • US11886737B2 patent drawing
  • US11886737B2 patent drawing

AI summary

A memory device can include a plurality of memory cells for storing data, a memory interface configured to store and retrieve data at the plurality of memory cells, a logic unit comprising digital circuitry configured to perform mathematic and logic operations, and a control circuitry configured to control operation of the memory device.