PIM CRC-MAC Architecture for Reliable In-Memory AI Computation
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Solution Overview
Problem
Processing-in-memory (PIM) devices face challenges in efficiently performing multiplication and accumulation operations due to limitations in data communication between memory and processor, which degrades the performance of artificial intelligence systems, especially in deep learning applications where increased computation requirements are exponential.
Innovation Solution
A PIM device is designed with a cyclic redundancy check (CRC) logic circuit for error detection and correction, and a multiplication and accumulation (MAC) operator to perform arithmetic operations directly within the memory, enhancing data processing speed and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a separate memory and processor system is used, then the system structure is simple and ease of manufacture is improved, but the data communication limitation degrades AI performance and computation speed
Solution Approach 1:
The patent merges the processor and memory into a single integrated PIM device, combining computational units (MAC operators) with memory cells in the same semiconductor chip. This eliminates the separate memory-processor architecture and enables direct computation within the memory structure, resolving the contradiction by improving computation speed while maintaining manufacturing feasibility through integrated device design.
Solution Approach 2:
The PIM device structure enables memory cells to serve dual purposes: both data storage and arithmetic computation. The MAC operators are integrated within the memory array, allowing the same physical structure to perform both memory functions and processing functions, thereby improving productivity without significantly increasing device complexity.
2Reliability
If the number of neural network layers is increased to improve AI performance, then the computation capability is improved, but the amount of computation required increases exponentially
Solution Approach 1:
The patent segments the computational workload by distributing MAC operators across multiple memory banks within the PIM device. Each memory bank can perform computations independently and in parallel, allowing complex neural network operations to be divided into smaller, manageable segments that can be processed simultaneously, thereby reducing the effective computation complexity while maintaining high AI performance.
Solution Approach 2:
The integrated PIM architecture enables continuous computation by eliminating data transfer bottlenecks between separate memory and processor. Neural network computations can proceed continuously through the integrated structure, with data flowing directly from memory cells to MAC operators and back, maintaining continuous useful action without interruption for data communication.
3Measurement precision
If CRC logic circuit is integrated in the PIM device, then the data processing accuracy is improved, but the device complexity increases
Solution Approach 1:
The CRC logic circuit is merged with the existing memory and MAC operator structure in the PIM device. The error detection and correction functionality is integrated into the same semiconductor chip as the computational units, allowing accuracy improvement through unified design rather than adding separate external error correction systems, thereby minimizing the increase in overall device complexity.
Data Source
AI summary
A processing-in-memory (PIM) device includes an CRC logic circuit configured to generate write data and a write fail check signal from write input data when a write operation in an operation mode is performed, and generate a fail flag signal and converted data from read data and a read fail check signal when a read operation in the operation mode is performed; and a MAC operator configured to perform a MAC arithmetic operation for the converted data and buffer data, based on the fail flag signal to generate MAC operation result data.