PIM Computing System DMA Offloading via Buffer Memory
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Solution Overview
Problem
Existing PIM computing systems face challenges in processing large-capacity memory requests without incurring cache hierarchy-related overhead, and current solutions require complex changes to the DMA engine design.
Innovation Solution
A PIM computing system that utilizes a DMA engine to offload PIM computations by storing descriptors for PIM transactions in DRAM, including opcode information in spare bit fields, allowing the system to process large-capacity memory requests without altering the DMA engine design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the design of the PIM computing system or DMA engine is changed to eliminate cache-related overhead, then cache-related overhead is reduced, but device complexity and implementation difficulty increase
Solution Approach 1:
The patent introduces a buffer memory as an intermediary component between the cache hierarchy and the PIM device. This buffer temporarily stores data during PIM computations, acting as a mediator that allows the DMA engine to operate without requiring complex design changes to eliminate cache-related overhead. The buffer absorbs the complexity of cache management while enabling efficient PIM operations.
Solution Approach 2:
The patent segments the memory system into distinct components: cache memory, buffer memory, and PIM device. This segmentation allows each component to operate independently with optimized functions, reducing the need for complex interactions and design changes in the DMA engine while minimizing cache-related overhead.
2Ease of operation
If standard memory requests are used for PIM computation, then ease of operation is maintained, but cache hierarchy limitations cause overhead
Solution Approach 1:
The buffer memory serves as an intermediary that enables standard memory requests to be used for PIM computation without incurring cache-related overhead. By placing data in the buffer before PIM operations, the system maintains ease of operation with standard requests while the buffer isolates the PIM device from cache hierarchy limitations.
3Productivity
If large-capacity memory requests are processed through the cache hierarchy, then productivity is maintained, but cache-related overhead increases
Solution Approach 1:
The patent extracts data from the cache hierarchy and places it directly into the buffer memory for PIM computations. This extraction eliminates the need for large-capacity memory requests to traverse the cache hierarchy, maintaining productivity while removing cache-related overhead. The buffer acts as a direct interface between the PIM device and external memory sources.
Data Source
AI summary
A Processing-In-Memory (PIM) computing system and a PIM computation offloading method thereof perform PIM computation offloading using a DMA engine. The DMA engine is configured to process a transaction by respectively performing descriptor requests and PIM requests for one or more descriptors stored in a memory, in response to a memory request of a CPU. The memory includes a PIM unit and a memory array, which memory array may be a DRAM. In response to the PIM requests, the PIM unit performs PIM operations using information included in data provided to the DMA engine in response to the descriptor requests.