Processing-in-Memory Dot Product Array for Reduced Data Transfer

Solution Overview

Problem

Conventional computer-based computations for operations like forward and backward propagation in neural networks are processor and memory intensive, requiring extensive data transfer between compute cores and memory arrays, which can be inefficient in terms of performance and power usage.

Innovation Solution

Implementing processing-in-memory (PIM) operations within a memory device, where a processor is integrated near or on the same chip as the memory array, allowing for dot product operations to be performed internally without external data transfer, using a memory array with bit lines, word lines, and a summing circuit to generate the product of two numbers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If processing operations are performed externally using separate processor and memory components, then computational functionality is provided, but extensive data transfer between compute cores and memory arrays is required, reducing performance and increasing power consumption

Engineering Contradiction:

Improveprocessing performanceVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent merges the processor and memory array into a single integrated device, allowing processing operations to be performed directly within the memory device. This combination eliminates the need for data transfer between separate compute cores and memory arrays, thereby improving processing performance and reducing power consumption simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

2Productivity

If processing operations are performed externally using separate processor and memory components, then computational functionality is provided, but extensive data transfer between compute cores and memory arrays is required, reducing performance

Engineering Contradiction:

Improveprocessing performanceVSAvoiddata transfer time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent merges the processor and memory array into a single integrated device, allowing processing operations to be performed directly within the memory device. This combination eliminates the need for data transfer between separate compute cores and memory arrays, thereby improving processing performance and reducing power consumption simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If processing operations are performed externally using separate processor and memory components, then computational functionality is provided, but extensive external communications are required

Engineering Contradiction:

Improvecomputational functionalityVSAvoidsystem architecture

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the processor and memory array into a single integrated device, allowing processing operations to be performed directly within the memory device. This combination eliminates the need for data transfer between separate compute cores and memory arrays, thereby improving processing performance and reducing power consumption simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS11537861B2Methods of performing processing-in-memory operations, and related devices and systems

Publication Date: 2022.12.27 MICRON TECHNOLOGY INC

AI summary

Methods, apparatuses, and systems for in-or near-memory processing are described. Bits of a first number may be stored on a number of memory elements, wherein each memory element of the number of memory elements intersects a bit line and a word line of a number of word lines. A number of signals corresponding to bits of a second number may be driven on the number of word lines to generate a number of output signals. A value equal to a product of the first number and the second number may be generated based on the number of output signals.