PIM ECC-MAC Architecture for In-Memory Neural Network Compute
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Solution Overview
Problem
Processing-in-memory (PIM) devices face challenges in efficiently performing multiplication/accumulation (MAC) operations due to limitations in data communication between separate processor and memory units, which hinders the performance of artificial intelligence applications, especially deep learning processes.
Innovation Solution
A PIM device is designed with an integrated ECC logic circuit for error correction and a MAC operator that performs arithmetic operations directly within the memory, enabling efficient MAC operations by generating write and read data, and parity, and executing MAC calculations using converted data and buffer data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a general hardware system with separate memory and processor is used, then the system structure is simple and easy to manufacture, but the data communication limitation between memory and processor degrades AI performance
Solution Approach 1:
The patent merges the processor and memory into a single integrated PIM device, where arithmetic logic units are directly coupled to memory cells. This allows multiplication and accumulation operations to be performed within the memory structure itself, eliminating the need for separate data communication between processor and memory, thus resolving the contradiction between simple system structure and AI performance.
2Productivity
If the number of layers in neural network is increased to improve AI performance, then the computation requirement increases exponentially, but the separate memory-processor architecture cannot handle the increased computation efficiently
Solution Approach 1:
By integrating arithmetic logic units directly within the memory structure, the PIM device performs multiplication and accumulation operations in-place during memory access operations. This eliminates the need for separate computation units and reduces the exponential growth of computation requirements, enabling efficient handling of deep neural networks with increased layers.
Solution Approach 2:
The memory structure itself performs arithmetic operations without requiring external processor intervention. The arithmetic logic units are embedded within the memory array, allowing the memory to serve both storage and computation functions simultaneously, thereby reducing overall system power consumption and computation requirements.
3Speed
If PIM device integrates processor and memory in one chip to improve data processing speed, then the data communication efficiency is improved, but the device complexity increases
Solution Approach 1:
The patent integrates arithmetic logic units directly with memory cells in a unified structure, where the same physical infrastructure serves both storage and computation purposes. This merging approach improves data processing speed by eliminating data transfer between separate components while managing device complexity through shared structural elements rather than adding separate integrated components.
Data Source
AI summary
A processing-in-memory (PIM) device includes an ECC logic circuit configured to generate write data and write parity from write input data when a write operation in an operation mode is performed, and generate converted data from read data and read parity when a read operation in an operation mode is performed; and a MAC operator configured to perform a MAC arithmetic operation for the converted data and buffer data to generate MAC operation result data.