PIM Instruction Delta Decoding for Control Flow Divergence

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Solution Overview

Problem

PIM architectures face challenges in managing control flow divergence and command buffer complexity due to conditional and multi-bank instructions, leading to reduced performance and increased resource consumption.

Innovation Solution

Implementing instruction deltas in PIM commands, where undefined portions are decoded at runtime, reducing the need for multiple entries in command buffers and simplifying programming complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple entries are used in command buffers to handle conditional and multi-bank instructions, then control flow divergence is managed, but command buffer size and programming complexity increase

Engineering Contradiction:
Improvecontrol flow divergence managementVSAvoidcommand buffer complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple command buffer entries into a single entry by introducing a delta encoding mechanism. Instead of storing complete instructions for each control flow path, the system stores a base instruction and incremental delta values that define variations. This combining approach reduces the number of entries needed in the command buffer while maintaining the ability to handle divergent control flows effectively.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent inverts the traditional approach by not storing complete instructions for each control flow path. Instead, it stores differences (deltas) from a base instruction. This inversion transforms the problem from managing multiple complete entries to managing compact differential representations, thereby reducing command buffer complexity while preserving control flow divergence management capabilities.

Inventive Principle:
Principle #13The other way round (Inversion)

2Measurement precision

If complete instructions are stored for each control flow path, then execution accuracy is maintained, but memory bandwidth and storage requirements increase

Engineering Contradiction:
Improveinstruction execution accuracyVSAvoidcommand buffer memory usage
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts only the essential varying portions of instructions (the deltas) from complete instruction sequences. By separating the base instruction from its variations and storing only the differential information, the system maintains execution accuracy for all control flow paths while significantly reducing the memory storage requirements in the command buffer.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a form of copying where a base instruction is referenced multiple times with incremental delta modifications. Instead of storing duplicate complete instructions for each control flow path, the system copies the base instruction concept and applies differential updates, thereby maintaining accuracy while reducing memory usage through shared representation.

Inventive Principle:
Principle #26Copying

3Device complexity

If instruction deltas are decoded at runtime, then command buffer size is reduced, but decoding overhead and processing time increase

Engineering Contradiction:
Improvecommand buffer sizeVSAvoidinstruction decoding time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-organizing instruction deltas in a structured format that enables efficient runtime decoding. The delta encoding scheme is designed beforehand with clear bit-field definitions and update rules, allowing the decoding logic to operate quickly during execution without introducing significant overhead. This preliminary structuring balances the reduction in buffer size with minimal decoding time penalty.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260003623A1Instruction Deltas For Processing-In-Memory Divergence
Publication Date: 2026.01.01 ADVANCED MICRO DEVICES INC
  • US20260003623A1 patent drawing
  • US20260003623A1 patent drawing
  • US20260003623A1 patent drawing

AI summary

Instruction deltas for processing-in-memory divergence are described. In one or more implementations, a system includes a memory and a processing-in-memory component configured to identify an instruction delta based on one or more undefined portions of an instruction of a PIM command and decode the instruction delta into one or more defined portions of the instruction to be used in place of the undefined portions to execute the instruction. In one or more implementations, a processing-in-memory component includes at least one computational unit of an in-memory processor that identifies an instruction delta based on one or more undefined portions of an instruction of a PIM command, decodes the instruction delta into one or more defined portions of the instruction to be used during execution in place of the undefined portions, and executes the instruction based on the defined portions.